| Congestion-Driven Multilevel Full-Chip Routing Framework |
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| 作者姓名： | 姚海龙 蔡懿慈 洪先龙 |
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| 作者单位： | Department of Computer Science and Technology，Tsinghua University |
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| 基金项目： | Supported by the National Natural Science Foundation of China （Nos. 60776026 and 60720106003） |
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| 摘 要： | A W-shaped multilevel full-chip routing framework using W-shaped optimization flow is used to find the final routing solution. The W-shaped flow consists of two sequential V-shaped optimization flows. The first V-shaped flow optimizes the global routing solution. The probabilistic congestion prediction technique is used to guide the global routing decision to find the routing solution that evenly distributes the nets. Then, the second V-shaped flow improves the quality of the routing result. Tests on a set of commonly used benchmark circuits and comparisons with other multilevel routing systems show that the routability, total wire length, total number of vias, and the runtime are all improved.
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| 关 键 词： | 物理设计 多级路由选择 全芯片路由选择 拥塞 |
| 收稿时间： | 8 January 2007 |
| 修稿时间： | 25 May 2007. |
Congestion-Driven Multilevel Full-Chip Routing Framework |
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| Hailong Yao, Ú
, Yici Cai, &#x;ÿ&#x;,Xianlong Hong, Ú&#x;.Congestion-Driven Multilevel Full-Chip Routing Framework[J].Tsinghua Science and Technology,2008,13(6):843-849. |
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| Authors: | Hailong Yao Ú
Yici Cai &#x;ÿ&#x; Xianlong Hong Ú&#x; |
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| Affiliation: | bDepartment of Computer Science and Technology, Tsinghua University, Beijing 100084, China |
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| Abstract: | A W-shaped multilevel full-chip routing framework using W-shaped optimization flow is used to find the final routing solution. The W-shaped flow consists of two sequential V-shaped optimization flows. The first V-shaped flow optimizes the global routing solution. The probabilistic congestion prediction technique is used to guide the global routing decision to find the routing solution that evenly distributes the nets. Then, the second V-shaped flow improves the quality of the routing result. Tests on a set of commonly used benchmark circuits and comparisons with other multilevel routing systems show that the routability, total wire length, total number of vias, and the runtime are all improved. |
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| Keywords: | physical design multilevel routing full-chip routing congestion |
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