高速数字PID控制器的ASIC设计

在传统数字ＰＩＤ控制器中，计算占据了大量的时间。因此，在很多场合需要一种运算速度很高而同时又具有高性能价格比的硬件实现形式。本文首先给出了一种实现有符号数相乘的并行定点乘法器设计方案，在此基础上提出了高速数字ＰＩＤ控制器的ＡＳＩＣ设计方案，随后介绍了控制器的版图设计以及逻辑模拟，结果证明设计是成功的。

The ASIC Design of A High Speed PID Controller

In PID controller, the main feature is the overhead of large computation. Thus a low cost-performance ratio PID controller with the very fast calculation is competent to deal with various specific applications. According to the mentioned above, a digital PID controller's ASIC design is presented in this paper. The VLSI architecture is described in this paper. The implementation based on above structure is also givent here. It has been proved that the ASIC design is successful.