| 一种24 GHz CMOS功率放大器设计 |
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| 引用本文： | 彭 尧,何 进,王 冲,王 豪,常 胜,黄启俊. 一种24 GHz CMOS功率放大器设计[J]. 太赫兹科学与电子信息学报, 2019, 17(4): 716-720 |
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| 作者姓名： | 彭 尧 何 进 王 冲 王 豪 常 胜 黄启俊 |
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| 作者单位： | School of Physics and Technology，Wuhan University，Wuhan Hubei 430072，China,School of Physics and Technology，Wuhan University，Wuhan Hubei 430072，China,School of Physics and Technology，Wuhan University，Wuhan Hubei 430072，China,School of Physics and Technology，Wuhan University，Wuhan Hubei 430072，China,School of Physics and Technology，Wuhan University，Wuhan Hubei 430072，China and School of Physics and Technology，Wuhan University，Wuhan Hubei 430072，China |
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| 基金项目： | 国家自然科学基金资助项目(61204096；61404094)；中央高校基本科研基金资助项目(2042015kf0174；2042014kf0238)；中国博士后科学基金资助项目(2012T50688)；湖北省自然科学基金资助项目(2014CFB694)；江苏省科学基金资助项目(BK20141218) |
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| 摘 要： | 基于130 nm互补金属氧化物半导体(CMOS)工艺，设计了一种高增益和高输出功率的24 GHz功率放大器。通过片上变压器耦合实现阻抗匹配和功率合成，有效改善放大器的匹配特性和提高输出功率。放大器电路仿真结果表明，在1.5 V供电电压下，功率增益为27.2 dB，输入输出端回波损耗均大于10 dB，输出功率1 dB压缩点13.2 dBm，饱和输出功率17.2 dBm，峰值功率附加效率13.5%。
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| 关 键 词： | 互补金属氧化物半导体；功率放大器；变压器耦合；功率合成 |
| 收稿时间： | 2017-12-20 |
| 修稿时间： | 2018-03-01 |
Design of a 24 GHz CMOS power amplifier |
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| PENG Yao,HE Jin,WANG Chong,WANG Hao,CHANG Sheng and HUANG Qijun. Design of a 24 GHz CMOS power amplifier[J]. Journal of Terahertz Science and Electronic Information Technology, 2019, 17(4): 716-720 |
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| Authors: | PENG Yao HE Jin WANG Chong WANG Hao CHANG Sheng HUANG Qijun |
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| Abstract: | A 24 GHz power amplifier with high gain and high output power based on 130 nm Comple-mentary Metal Oxide Semiconductor(CMOS) is designed. Impedance matching and power synthesis are achieved through on chip transform er coupling, which effectively promotes the matching characteristics and improves the output power of the amplifier. The simulation result shows that, under a 1.5 V power supply, the power gain is 27.2 dB; the input and output return losses are more than 10 dB; the 1dB output power compression point is 13.2 dBm with a saturated output power of 17.2 dBm; the peak Power Added Efficiency(PAE) is 13.5%. |
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