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基于GPS实现电力系统高精度同步时钟
引用本文:蒋陆萍,曾祥君,李泽文,彭安安.基于GPS实现电力系统高精度同步时钟[J].电网技术,2011(2).
作者姓名:蒋陆萍  曾祥君  李泽文  彭安安
作者单位:长沙理工大学电气与信息工程学院;南华大学电气工程学院;
基金项目:湖南省教育厅科研项目(09C079)
摘    要:根据全球定位系统(global positioning system,GPS)秒时钟的随机误差和高精度晶振的累计误差互补的特点,利用数字锁相原理,通过测量GPS秒时钟与晶振秒时钟间的相位差来控制晶振秒时钟的分频系数,实时消除晶振秒时钟的累计误差,从而产生高精度秒时钟,并利用复杂可编程逻辑器件(complex programmable logic device,CPLD)设计了高精度同步时钟系统。GPS信号接收正常时,CPLD根据数字锁相原理产生高精度同步时钟;GPS信号接收不正常时,CPU调取存储的分频系数控制CPLD产生高精度时钟。仿真分析和实验结果表明该时钟系统具有很高的时间准确度和稳定性。

关 键 词:全球定位系统  晶振  时钟  复杂可编程逻辑器件  秒脉冲  

Realization of High Accuracy Synchronous Clock for Power System Based on GPS
JIANG Luping,ZENG Xiangjun,LI Zewen,PENG An'an.Realization of High Accuracy Synchronous Clock for Power System Based on GPS[J].Power System Technology,2011(2).
Authors:JIANG Luping  ZENG Xiangjun  LI Zewen  PENG An'an
Affiliation:JIANG Luping1,ZENG Xiangjun1,LI Zewen1,PENG An'an2(1.School of Electrical and Information Engineering,Changsha University of Science & Technology,Changsha 410076,Hunan Province,China,2.School of Electrical Engineering,Nanhua University,Hengyang 421001,China)
Abstract:In view of the complementarities between the random error of one pulse per second(1PPS) in global positioning system(GPS) and accumulated error of high-precision crystal oscillator,based on the principle of digital phase-locked loop(DPLL) it is proposed to control frequency dividing coefficient of the crystal oscillator second clock by measuring the phase difference between 1PPS of GPS and the crystal oscillator second clock to eliminate the accumulated error of crystal oscillator in real-time mode,thus hig...
Keywords:global positioning system(GPS)  crystal oscillator  clock  complex programmable logic device(CPLD)  one pulse per second  
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