The thermal stability of one-transistor ferroelectric memory with Pt-Pb/sub 5/Ge/sub 3/O/sub 11/-Ir-poly-SiO/sub 2/-Si gate stack

The thermal stability of one-transistor ferroelectric nonvolatile memory devices with a gate stack of Pt-Pb/sub 5/Ge/sub 3/O/sub 11/-Ir-Poly-SiO/sub 2/-Si was characterized in the temperature range of -10/spl deg/C to 150/spl deg/C. The memory windows decrease when the temperatures are higher than 60/spl deg/C. The drain currents (I/sub D/) after programming to on state decrease with increasing temperature. The drain currents (I/sub D/) after programming to off state increase with increasing temperature. The ratio of drain current (I/sub D/) at on state to that at off state drops from 7.5 orders of magnitude to 3.5 orders of magnitude when the temperature increases from room temperature to 150/spl deg/C. On the other hand, the memory window and the ratio of I/sub D/(on)/I/sub D/(off) of the one-transistor memory device displays practically no change when the temperature is reduced from room temperature to -10/spl deg/C. One-transistor (1T) memory devices also show excellent thermal imprint properties. Retention properties of 1T memory devices degrade with increasing temperature over 60/spl deg/C.