| Low-Complexity Bit-Parallel Multiplier over GF(2$^m$) Using Dual Basis Representation |
| |
| 作者姓名： | Chiou-Yng Lee Jenn-Shyong Horng and I-Chang Jou |
| |
| 作者单位： | [1]Department of Computer Information and Network Engineering, Lunghwa University of Science and Technology Taoyuan County 333 [2]Dcpartment of Computer and Communication Engineering, National Kaohsiung First University of Science and Technology Kaohsiung |
| |
| 基金项目： | The work was supported in part by the ＂National Science Council＂ under Grant No. NSC-94-2218-E-262-003. Acknowledgements The authors would like to thank the anonymous reviewers for their valuable comments, which improved the revised version of this paper. |
| |
| 摘 要： | Recently, cryptographic applications based on finite fields have attracted much attention. The most demanding finite field arithmetic operation is multiplication. This investigation proposes a new multiplication algorithm over GF（2^m） using the dual basis representation. Based on the proposed algorithm, a parallel-in parallel-out systolic multiplier is presented, The architecture is optimized in order to minimize the silicon covered area （transistor count）. The experimental results reveal that the proposed bit-parallel multiplier saves about 65% space complexity and 33% time complexity as compared to the traditional multipliers for a general polynomial and dual basis of GF（2^m）.
|
| 关 键 词： | 内积 双重基础 Galois场GF（2^m） 低复杂性 计算机技术 |
| 收稿时间： | 2005-06-20 |
| 修稿时间： | 2005-06-202006-02-15 |
Low-Complexity Bit-Parallel Multiplier over GF(2m) Using Dual Basis Representation |
| |
| Chiou-Yng Lee,Jenn-Shyong Horng,and I-Chang Jou.Low-Complexity Bit-Parallel Multiplier over GF(2$^m$) Using Dual Basis Representation[J].Journal of Computer Science and Technology,2006,21(6):887-892. |
| |
| Authors: | Chiou-Yng Lee Jenn-Shyong Horng I-Chang Jou |
| |
| Affiliation: | 1Department of Computer Information and Network Engineering, Lunghwa University of Science and Technology Taoyuan County 333;2 Dcpartment of Computer and Communication Engineering, National Kaohsiung First University of Science and Technology Kaohsiung |
| |
| Abstract: | Recently, cryptographic applications based on finite fields have attracted much attention. The most demanding finite field arithmetic operation is multiplication. This investigation proposes a new multiplication algorithm over GF(2m) using the dual basis representation. Based on the proposed algorithm, a parallel-in parallel-out systolic multiplier is presented. The architecture is optimized in order to minimize the silicon covered area (transistor count). The experimental results reveal that the proposed bit-parallel multiplier saves about 65% space complexity and 33% time complexity as compared to the traditional multipliers for a general polynomial and dual basis of GF(2m). |
| |
| Keywords: | bit-parallel systolic multiplier inner product dual basis Galois field GF(2m) |
| 本文献已被 CNKI 维普 万方数据 SpringerLink 等数据库收录！ |
| 点击此处可从《计算机科学技术学报》浏览原始摘要信息 |
|
点击此处可从《计算机科学技术学报》下载全文 |
