| 高速印制电路板设计中的串扰问题和抑制 |
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| 引用本文： | 曾铮,郑建宏.高速印制电路板设计中的串扰问题和抑制[J].电子质量,2006(6):82-85. |
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| 作者姓名： | 曾铮 郑建宏 |
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| 作者单位： | 重庆邮电学院信科公司3G研究院,重庆,400065 |
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| 摘 要： | 本文剖析了在高速PCB板级设计中信号完整性分析领域信号串扰的产生机制,并利用HyperLynx软件包仿真,结合工作中的实践,提出了相应的解决方案.
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| 关 键 词： | 高速印制电路板 设计 串扰 分析 |
| 文章编号： | 1003-0107（2006）06-0082-04 |
Crosstalk Suppression of High-Speed Printed Circuit Board Design |
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| Zeng Zheng,Zheng Jian-hong.Crosstalk Suppression of High-Speed Printed Circuit Board Design[J].Electronics Quality,2006(6):82-85. |
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| Authors: | Zeng Zheng Zheng Jian-hong |
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| Affiliation: | 3G Insitiute of Chongyou Information Technology, Chongqing 400065,China |
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| Abstract: | After analyses the mechanisms which cause crosstalk in high-speed printed circuit board design, the paper introduce the using of HyperLynx software and some useful uniting experiences , and give the solution to eliminating crosstalk. |
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| Keywords: | High-Speed printed circuit board Design Crosstalk Analysis |
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