多晶硅超薄沟道薄膜晶体管研制

提出了一种新结构的低温多晶硅薄膜晶体管(poly-Si TFT).该poly-Si TFT由一超薄的沟道区和厚的源漏区组成.超薄沟道区可有效降低沟道内陷阱密度，而厚源漏区能保证良好的源漏接触和低的寄生电阻.沟道区和源漏区通过一低掺杂的交叠区相连接.该交叠区使得在较高偏置时，靠近漏端的沟道区电力线能充分发散，导致电场峰值显著降低.模拟结果显示该TFT漏电场峰值仅是常规TFT的一半.实验结果表明该TFT能获得好的电流饱和特性和高的击穿电压.而且，与常规器件相比，该TFT的通态电流增加了两倍，而最小关态电流减少了3.5倍

A Novel Ultra-Thin Channel Poly-Si TFT Technology

A novel low temperature poly-Si (LTPS) ultra-thin channel thin film transistor (UTC-TFT) technology is proposed. The UTC-TFT has an ultra-thin channel region (30nm) and a thick drain/source region (300nm). The ultra-thin channel region that can result in a lower grain-boundary trap density in the channel is connected to the heavily-doped thick drain/ source region through a lightly-doped overlapped region. The overlapped lightly-doped region provides an effective way for the electric field to spread in the channel near the drain at high drain biases, thereby reducing the electric field there significantly. Simulation results show the UTC-TFT experiences a 50% reduction in peak lateral electric field compared to that of the conventional TFT. With the low grain-boundary trap density and low drain electric field, excellent current saturation characteristics and high drain breakdown voltage are achieved in the UTC-TFT. Moreover, this technology provides the complementary LTPS-TFTs with more than 2 times increase in on-current, 3.5 times reduction in off-current compared to the conventional thick channel LTPS TFTs