| 基于FPGA的数字图像中值滤波器设计 |
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| 引用本文： | 徐大鹏, 李从善,.基于FPGA的数字图像中值滤波器设计[J].电子器件,2006,29(4):1114-1117. |
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| 作者姓名： | 徐大鹏 李从善 |
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| 作者单位： | 1. 中国科学院长春光学精密机械与物理研究所,长春,130061;中国科学院研究生院,北京,100039
2. 西安卫星测控中心,陕西,渭南,714000 |
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| 摘 要： | 在电视跟踪系统中，为了抑制数字视频图像存在的脉冲噪声和满足系统实时性的需要，对图像进行基于硬件的实时滤波处理是有重要意义的。通过分析常见的3X3滤波窗口的数学模型，提出了基于FPOA的中值滤波算法及其设计方案。结合现场可编程门阵列FPOA的并行结构和适合流水线设计的结构特点，采用VHDL语言进行电路设计，利用仿真工具MODELSIM进行时序仿真验证。实际应用中表明可以滤除脉冲噪声，有效地改善了图像的质量，满足系统的实时性要求，提高了系统性能。
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| 关 键 词： | 中值滤波 实时处理 数字视频图像 流水线 |
| 文章编号： | 1005-9490（2006）04-1114-04 |
| 收稿时间： | 2006-02-15 |
| 修稿时间： | 2006-02-15 |
Design of Median Filter for Digital Image Based on FPGA |
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| XU Da-peng.Design of Median Filter for Digital Image Based on FPGA[J].Journal of Electron Devices,2006,29(4):1114-1117. |
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| Authors: | XU Da-peng~ |
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| Affiliation: | 1.Changchun Institute of Optics; Fine Mechanics and Physics; Chinese Academy of Sciences; Changchun 130031; China; 2.Graduate School of Chinese Academy of Sciences; Beijing 100039; 3.Xi an Satellite Control Center; Weinan; Shanxi 714000; |
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| Abstract: | In the television t racking sy stem, r eal??time f iltering based o n hardw are is v ery sig nif icant to meet
the demands o f real??t ime image pro cess and to rest rain pulse no ise. T he mathemat ical model of 3 3 tem??
plate is analyzed and a new median filter algor ithm and cor respo nding solut ion based on FPGA is presen??
ted. FPGA can realize co ncurr ent and pipel ine architecture eff icient ly, and is used as hardw are plat form to
realize the algo rithm. T he desig n is descr ibed w ith VHDL, Verified thr oug h MODELSIM simulator . Re??
sult show s the desig n can f ilter pulse noise and improved the quality of imag e, in applicat io n, met sy stem
real- t ime demands, impro ved the performances of system. |
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| Keywords: | FPGA |
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