Analytical threshold voltage model for cylindrical surrounding-gate MOSFET with electrically induced source/drain extensions |
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| Authors: | Cong Li Yiqi Zhuang Gang Jin |
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| Affiliation: | a Key Laboratory for Wide Band-Gap Semiconductor Materials and Devices of Ministry of Education, School of Microelectronics, Xidian University, Xi’an 710071, China
b Aviation Microelectronics Center, Northwestern Polytechnic University, Xi’an 710072, China |
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| Abstract: | Physics-based analytical threshold voltage model for cylindrical surrounding-gate MOSFET with electrically induced source/drain extensions is presented. The effect of inversion carriers on the channel’s potential is considered in presented model. Using this analytical model, the characteristics of EJ-CSG are investigated in terms of surface potential and electric field distribution, threshold voltage roll-off, and DIBL. Results show that the application of electrically induced S/D extensions to the cylindrical surrounding-gate MOSFET will successfully suppress the hot-carrier effects, threshold voltage roll-off, and DIBL. It is also revealed that a moderate side-gate bias voltage, a small gate oxide thickness, and a small silicon channel radius are needed to improve device characteristics. The derived analytical model is verified by its good agreement with the three-dimensional numerical device simulator ISE. |
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