| 纳米CMOS电路的应变Si衬底制备技术 |
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| 引用本文： | 陈长春,刘江锋,余本海,戴启润,刘志弘.纳米CMOS电路的应变Si衬底制备技术[J].微纳电子技术,2006,43(7):309-318. |
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| 作者姓名： | 陈长春 刘江锋 余本海 戴启润 刘志弘 |
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| 作者单位： | [1]河南省信阳师范学院物理与电子工程学院,河南信阳464000 [2]清华大学微电子学研究所,北京100084 |
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| 摘 要： | 应变硅衬底材料——弛豫SiGe层作为应变硅技术应用的基础,其质量的好坏对应变硅器件性能有致命的影响。综述了近年来用于纳米CMOS电路的各类弛豫SiGe层的制备技术,并对弛豫SiGe层中应变测量技术进行了简单的介绍,以期推动应变硅技术在我国芯片业的应用。
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| 关 键 词： | SiGe虚拟衬底 应变Si CMOS器件 |
| 文章编号： | 1671-4776(2006)07-0309-10 |
| 收稿时间： | 2006-02-24 |
| 修稿时间： | 2006年2月24日 |
Strained Si Substrate Technology for Nano-Meter CMOS Circuit Application |
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| CHEN Chang-chun, LIU Jiang-feng, YU Ben-hai, DAI Qi-run, LIU Zhi-hong.Strained Si Substrate Technology for Nano-Meter CMOS Circuit Application[J].Micronanoelectronic Technology,2006,43(7):309-318. |
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| Authors: | CHEN Chang-chun LIU Jiang-feng YU Ben-hai DAI Qi-run LIU Zhi-hong |
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| Abstract: | Fabrication of strained Si epilayer requires strain-relaxed SiGe buffer layers to serve as virtual substrates. The quality of strain-relaxed SiGe buffer layers has lethal influence on the performance of high-speed strained Si devices. Traditional and up-date methods for the nano-meter CMOS fabrication of high-quality strain-relaxed SiGe virtual substrate were reviewed. Meantime, how to determine the strain stored in SiGe virtual substrate layers was discussed. Expecting this know-how will provide valuable help for reader. |
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| Keywords: | SiGe virtual substrate strain Si CMOS apparatus |
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