JPEG图像硬件解码低功耗设计

分析了JPEG标准的压缩/解压缩算法,以VLSI方式实现了基于JPEG标准的解码流程,在关键模块--Huffman解码、IDCT上进行了算法级、结构级和电路级等层次的综合考虑,使其有更好的功耗代价,使其能够在图像传感器上得到应用.通过测试平台对其VLSI进行了RTL级和门级的仿真.结果表明,功能符合需求.

Low-power design of JPEG graphics hardware decoding

Analysis of the baseline algorithm modules of JPEG standard the decode system of JPEG baseline system has been implemented in VLSI way.Especially the key modules of JPEG standard algorithm-Huffman decoding,IDCT are improved and optimized in order to get a good power dissipation.Power consumption is optimized from algorithm level,architecture level and circuit level synthetically.Finally,through the erection of a relatively complete test platform we implement the VLSI of RTL-level and gate-level simulation.The results showed that function meet the demand.