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高速数据通信及其差错控制研究
引用本文:秦岩,武荣伟,苏涛.高速数据通信及其差错控制研究[J].火控雷达技术,2012(3):54-59.
作者姓名:秦岩  武荣伟  苏涛
作者单位:西安电子科技大学,西安,710071
摘    要:提出一种基于嵌入式时钟的高速数据通信方案及其差错控制编译码算法,并分析了性能。采用信道编码调制技术将时钟信息嵌入到高速串行数据流中,实现自同步传输,突破了外同步方式下传输距离和传输速率的上限,使远程传输带宽达3Gbps以上。针对高速调制信道的特点,在经典汉明码基础上引入交织技术,把可能存在的连续误码转为单个随机错误,简化了差错控制算法的复杂度,提高了编码效率和纠错性能。其编译码电路延时小、易实现、码率易控,方便高速数据通信系统应用,且能显著改善低信噪比条件下传输的可靠性。

关 键 词:高速数据通信  同步  FPGA  交织技术  差错控制  码率

Research on High-Speed Data Communication and Error Control
Qin Yan,Wu Rongwei,Su Tao.Research on High-Speed Data Communication and Error Control[J].Fire Control Radar Technology,2012(3):54-59.
Authors:Qin Yan  Wu Rongwei  Su Tao
Affiliation:(Xidian University,Xi′an 710071)
Abstract:A high-speed data communication scheme based on embedded clock is proposed,its error control encoding algorithm and performance analysis are given.Clock information is embedded into high-speed serial data stream by using of channel encoding modulation technology,self-synchronous transmission is achieved and the up-limits of transmission distance and transmission data rate in external synchronous mode are broken through,long-distance transmission bandwidth is up to 3.0Gbps.According to features of high-speed modulated channel,interleaving technology is introduced to classic Hamming code theory,thereby possible continuous error code is converted to single random error,which simplifies the algorithm;and encoding efficiency and error correction performance both get improved.The decoding circuit features less delay,easy for implementation and easy to control code rate,therefore this code scheme can be easily used in high-speed data communication,and transmission reliability under low signal to noise ratio can be improved significantly.
Keywords:high-speed data communication  synchronization  FPGA  interleaving technology  error control  code rate
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