嵌人式与独立存储器设计上的差异分析和研究

进入21世纪,随着集成电路的发展,SoC(System on Chip)片上系统应运而生。而作为SoC重要组成部分的嵌入式存储器,在SoC中所占的比重正逐步增加,并起着越来越重要的作用,那么嵌入式存储器与独立的存储器芯片在设计上存在着哪些差异?对此本文将以NOR型闪存为例在制造工艺的选取、衍生产品的设计、功耗与噪声、后端功能仿真、测试与修复等方面进行分析和研究。     

基于电源、地桥的电源网络布线后优化

随着集成电路规模的不断增大,电源网络的重要性日趋显著,电源网络的分布直接影响芯片的电压降(IR-drop)。一种布线后通过在空闲处插入电源桥和地桥的方法,可以在不增加芯片面积的情况下,改善IR-drop效应。实验结果表明在芯片布局利用率不高的情况下(70~75%),该方法可以使IR-drop得到明显的优化。     

我国IC产业发展状况分析

本文分析了集成电路及其相关技术的现状和发展趋势。分析了国内集成电路产业状况和面临的课题。     

基于IP核复用技术的SoC设计

概述了国内外IP产业的发展情况,论述了我国发展IP核复用技术SoC设计的可能性和必要性,指出我国急需发展的关键芯片及IP核种类.     

铁电存储场效应晶体管I-V特性的物理机制模拟

文章讨论的模型主要描述了铁电存储场效应晶体管（FEMFET）的I-V特性。从理论结果可反映出几何尺寸效应和材料参数对晶体管电特性的影响。传统的阈值电压的概念巳不再适用，由于铁电层反偏偶极子的开关作用，自发极化的增加对存储器的工作状态产生很小的影响。该模型可用于设计和工艺参数的优化，并由直观原型的方法得到了验证。     

变长线扫描选择性激光烧结快速成型工艺的质量和效率优势分析

本文分析变长线扫描选择性激光烧结快速成型工艺对点扫描工艺的质量和效率优势.对二者光学系统结构作分析对比,对焦斑和线束上的功率密度作计算对比.变长线扫描系统采用的扫描方式和聚焦元件使线束宽度小且恒定,线束功率密度与点扫描焦斑的相当.变长线扫描选择性激光烧结快速成型工艺的质量优势是明显的,效率比点扫描工艺提高一倍左右.     

CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing

As System on a Chip (SoC) testing faces new challenges, some new test architectures must be developed. This paper describes a Test Access Mechanism (TAM) named CAS-BUS that solves some of the new problems the test industry has to deal with. This TAM is scalable, flexible and dynamically reconfigurable. The CAS-BUS architecture is compatible with the IEEE P1500 standard proposal in its current state of development, and is controlled by Boundary Scan features.This basic CAS-BUS architecture has been extended with two independent variants. The first extension has been designed in order to manage SoC made up with both wrapped cores and non wrapped cores with Boundray Scan features. The second deals with a test pin expansion method in order to solve the I/O bandwidth problem. The proposed solution is based on a new compression/decompression mechanism which provides significant results in case of non correlated test patterns processing. This solution avoids TAM performance degradation.These test architectures are based on the CAS-BUS TAM and allow trade-offs to optimize both test time and area overhead. A tool-box environment is provided, in order to automatically generate the needed component to build the chosen SoC test architecture.     

Object-oriented DBMS requirements

The requirements on an object-oriented DBMS for management of information in a large, complex enterprise are presented. These requirements aid in the achievement of an environment characterized by data sharing, open architectures, application and data portability, and assurance of data integrity. They were defined from the point of view of a user of the DBMS; therefore they describe the expected functionality of the DBMS and do not specify the method of implementation to achieve this functionality. They encompass requirements on the data model, query and data manipulation languages, the system architecure, interfaces to the system, change management, and transaction management.     

A framework of virtual prototyping environment for the design and analysis of mechanical mechanism with clearance

Mechanical mechanisms with clearance abound in technological fields such as robotics, machine and steam turbine industry. The dynamic performance of these mechanisms in working condition can be achieved provided that the effects of the different on the mechanisms (such as mechanism dynamics, technological effects and thermal behaviour) are thoroughly understood. Virtual prototyping provides an integration of multi-domain dynamic simulation for the design and analysis process. In the current paper, a framework of virtual prototyping environment for the design and analysis of mechanical mechanism with clearance is presented. A case study with such a simulation strategy is studied for the optimum design and analysis of the technological parameter.     

SoC低功耗设计中的DVS技术

随着系统芯片(SoC)集成更多的功能并采用更先进的工艺,它所面临的高性能与低功耗的矛盾越来越突出.动态电压调整(DVS)技术可以在不影响处理器性能的前提下,通过性能预测软件根据处理器的繁忙程度调整处理器的工作电压和工作频率,达到降低芯片功耗的目的.文中讨论了DVS技术降低功耗的可能性,介绍了如何利用两种不同的DVS技术让处理器根据当前的工作负荷运行在不同的性能水平上,以节省不必要的功耗.