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在视频编码的过程中,运动估计占据了举足轻重的地位.其性能优劣会在一定程度上决定了码流质量.采用16×16宏块能够提高压缩比,但容易产生方块效应,使用4×4宏块可以提高图像质量,但降低了压缩比。H.264视频压缩标准采用多模式运动估计,可以有效减少块匹配预测误差,但随着模式的增多,算法计算量成倍增加.为了克服这个困难,本文提出一种新的自适应的宏块划分和运动估计算法。这种分块算法在综合考虑图像本身特性在编码过程中,根据图像的各个部分运动程度不同而采用不同的分快策略,兼顾图像质量和处理开销。 相似文献
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设计了一个用于GSM系统的Sigma-Delta调制器. GSM系统要求信号带宽大于200kHz,动态范围大于80dB. 为了能取得较低的过采样率以降低功耗,采用了级联结构(MASH)来实现,与单环高阶结构相比,它具有稳定及易于实现的优点. 设计工作时钟为16MHz,过采样率为32,基带带宽为250kHz,电路仿真可以达到最高82dB的SNDR和87dB的动态范围. 芯片采用SMIC 0.18μm工艺进行流片,面积为1.2mm×1.8mm. 芯片测试效果最高SNDR=74.4dB,动态范围超过80dB,测试结果与电路仿真结果相近,达到了预定的设计目标. 芯片工作在18V电源电压下,功耗为16.7mW. 相似文献
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An integrated fully differential ultra-wideband CMOS RF front-end for 6-9 GHz is presented.A resistive feedback low noise amplifier and a gain controllable IQ merged folded quadrature mixer are integrated as the RF front-end. The ESD protected chip is fabricated in a TSMC 0.13μm RF CMOS process and achieves a maximum voltage gain of 23-26 dB and a minimum voltage gain of 16-19 dB,an averaged total noise figure of 3.3-4.6 dB while operating in the high gain mode and an in-band IIP3 of-12.6 dBm while in th... 相似文献
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A fully integrated low power RF transmitter for a WiMedia 3.1-4.8 GHz multiband orthogonal frequency division multiplexing ultra-wideband system is presented. With a separate transconductance stage, the quadrature up-conversion modulator achieves high linearity with low supply voltage. The co-design of different resonant frequencies of the modulator and the differential to single (D2S) converter ensures in-band gain flatness. By means of a series inductor peaking technique, the D2S converter obtains 9 dB more gain without extra power consumption. A divided-by-2 divider is used for carrier signal generation. The measurement results show an output power between -10.7 and -3.1 dBm with 7.6 dB control range, an OIP3 up to 12 dBm, a sideband rejection of 35 dBc and a carrier rejection of 30 dBc. The ESD protected chip is fabricated in the Jazz 0.18μm RF CMOS process with an area of 1.74 mm^2 and only consumes 32 mA current (at 1.8 V) including the test associated parts. 相似文献
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文中给出了一个应用于超宽带射频接收机中的全集成低噪声放大器,该低噪声放大器采用了电阻并联负反馈与源极退化电感技术的结合,为全差分结构,在Jazz0.18μm RF CMOS工艺下实现,芯片面积为1.08mm2,射频端ESD抗击穿电压为1.4kV。测试结果表明,在1.8V电源电压下,该LNA的工作频带为3.1~4.7GHz,功耗为14.9mW,噪声系数(NF)为1.91~3.24dB,输入三阶交调量(IIP3)为-8dBm。 相似文献