Deep Learning Based Process Analytics Model for Predicting Type 2 Diabetes Mellitus

Process analytics is one of the popular research domains that advanced in the recent years. Process analytics encompasses identification, monitoring, and improvement of the processes through knowledge extraction from historical data. The evolution of Artificial Intelligence (AI)-enabled Electronic Health Records (EHRs) revolutionized the medical practice. Type 2 Diabetes Mellitus (T2DM) is a syndrome characterized by the lack of insulin secretion. If not diagnosed and managed at early stages, it may produce severe outcomes and at times, death too. Chronic Kidney Disease (CKD) and Coronary Heart Disease (CHD) are the most common, long-term and life-threatening diseases caused by T2DM. Therefore, it becomes inevitable to predict the risks of CKD and CHD in T2DM patients. The current research article presents automated Deep Learning (DL)-based Deep Neural Network (DNN) with Adagrad Optimization Algorithm i.e., DNN-AGOA model to predict CKD and CHD risks in T2DM patients. The paper proposes a risk prediction model for T2DM patients who may develop CKD or CHD. This model helps in alarming both T2DM patients and clinicians in advance. At first, the proposed DNN-AGOA model performs data preprocessing to improve the quality of data and make it compatible for further processing. Besides, a Deep Neural Network (DNN) is employed for feature extraction, after which sigmoid function is used for classification. Further, Adagrad optimizer is applied to improve the performance of DNN model. For experimental validation, benchmark medical datasets were used and the results were validated under several dimensions. The proposed model achieved a maximum precision of 93.99%, recall of 94.63%, specificity of 73.34%, accuracy of 92.58%, and F-score of 94.22%. The results attained through experimentation established that the proposed DNN-AGOA model has good prediction capability over other methods.     

Plasma immersion ion implantation for SOI synthesis: SIMOX and ion-cut

We have demonstrated feasibility to form silicon-on-insulator (SOI) substrates using plasma immersion ion implantation (PIII) for both separation by implantation of oxygen and ion-cut. This high throughput technique can substantially lower the high cost of SOI substrates due to the simpler implanter design as well as ease of maintenance. For separation by plasma implantation of oxygen wafers, secondary ion mass spectrometry analysis and cross-sectional transmission electron micrographs show continuous buried oxide formation under a single-crystal silicon overlayer with sharp Si/SiO₂ interfaces after oxygen plasma implantation and high-temperature (1300°C) annealing. Ion-cut SOI wafer fabrication technique is implemented for the first time using PIII. The hydrogen plasma can be optimized so that only one ion species is dominant in concentration and there are minimal effects by other residual ions on the ion-cut process. The physical mechanism of hydrogen induced silicon surface layer cleavage has been investigated. An ideal gas law model of the microcavity internal pressure combined with a two-dimensional finite element fracture mechanics model is used to approximate the fracture driving force which is sufficient to overcome the silicon fracture resistance.     

Microwave-Assisted Synthesis of Fine Particle Oxides Employing Wet Redox Mixtures

Interaction of electromagnetic radiation with a physical mixture of metal nitrates and amides/hydrazides is observed to initiate high-temperature reactions, useful for realizing several high-temperature ceramic materials. A judicious choice of such redox mixtures undergoes exothermic reactions when they couple with microwave radiation. The coupling of electromagnetic radiation with metal salts and amides/hydrazides depends on the dielectric properties of the individual components in the reaction mixture. The approach has been used to prepare γ-Fe₂O₃, Fe₃O₄, MgCr₂O₄, α-CaCr₂O₄, and La_0.7Ba_0.3MnO₃.     

Isothermal oxidation behavior of FeCo–2V intermetallic alloy

Isothermal oxidation behavior and the nature of oxide layer formed during oxidation of FeCo–2V alloy were characterized in the temperature range of 500–600 °C. Oxidation kinetics of the alloy follows a parabolic rate law. SEM and XRD studies indicate the formation of an iron rich outer oxide layer and an inner solute rich layer containing cobalt and vanadium rich oxides. The oxidation mechanism of the FeCo–2V alloy is similar to that of low alloy steels. During the initial stages, preferential oxidation of iron and cobalt occurs at the alloy surface and leads to the formation of a solute rich inner layer. Continued oxidation occurs through oxidation of iron and cobalt at the outer layer and internal oxidation of inner layer. The iron rich oxide layer formed at the surface on oxidation of FeCo alloy is semi-conducting in nature and may not provide the necessary insulating barrier required at the surface to minimize eddy current losses during A.C. applications.     

An effective deep learning model for grading abnormalities in retinal fundus images using variational auto-encoders

Diabetic retinopathy (DR) and Diabetic Macular Edema (DME) are severe diseases that affect the eyes due to damage in blood vessels. Computer-aided automated grading will help clinicians conduct disease diagnoses at ease. Experiments of automated image processing with deep learning techniques using CNN produce promising results, especially in the medical imaging domain. However, the disease grading tasks in retinal images using CNN struggle to retain high-quality information at the output. A novel deep learning model based on variational auto-encoder to grade DR and DME abnormalities in retinal images is proposed. The objective of the proposed model is to extract the most relevant retinal image features efficiently. It focuses on addressing less relevant candidate region generation and translational invariance present in images. The experiments are conducted in IDRID dataset and evaluated using accuracy, U-kappa, sensitivity, specificity and precision metrics. The results outperform compared with other state-of-art techniques.     

Architectural design and FPGA implementation of radix-4 CORDIC processor

A new scaled radix-4 CORDIC architecture that incorporates pipelining and parallelism is presented. The latency of the architecture is n/2 clock cycles and throughput rate is one valid result per n/2 clocks for n bit precision. A 16 bit radix-4 CORDIC architecture is implemented on the available FPGA platform. The corresponding latency of the architecture is eight clock cycles and throughput rate is one valid result per eight clock cycles. The entire scaled architecture operates at 56.96 MHz of clock rate with a power consumption of 380 mW. The speed can be enhanced with the upgraded version of FPGA device. A speed-area optimized processor is obtained through this architecture and is suitable for real time applications.     

Hybrid algorithms for complete exchange in 2D meshes

Parallel algorithms for several common problems such as sorting and the FFT involve a personalized exchange of data among all the processors. Past approaches to doing complete exchange have taken one of two broad approaches: direct exchange or the indirect message-combining approaches. While combining approaches reduce the number of message startups, direct exchange minimizes the volume of data transmitted. This paper presents a family of hybrid algorithms for wormhole-routed 2D meshes that can effectively utilize the complementary strengths of these two approaches to complete exchange. The performance of hybrid algorithms using Cyclic Exchange and Scott's Direct Exchange are studied using analytical models, simulation, and implementation on a Cray T3D system. The results show that hybrids achieve lower completion times than either pure algorithm for a range of mesh sizes, data block sizes, and message startup costs. It is also demonstrated that barriers may be used to enhance performance by reducing message contention, whether or not the target system provides hardware support for barrier synchronization. The analytical models are shown useful in selecting the optimum hybrid for any given combination of system parameters (mesh size, message startup time, flit transfer time, and barrier cost) and the problem parameter (data block size)     

Towards locally and globally shape-aware reverse 3D modeling

The process of re-creating CAD models from actual physical parts, formally known as digital shape reconstruction (DSR) is an integral part of product development, especially in re-design. While, the majority of current methods used in DSR are surface-based, our overarching goal is to obtain direct parameterization of 3D meshes, by avoiding the actual segmentation of the mesh into different surfaces. As a first step towards reverse modeling physical parts, we extract (1) locally prominent cross-sections (PCS) from triangular meshes, and (2) organize and cluster them into sweep components, which form the basic building blocks of the re-created CAD model. In this paper, we introduce two new algorithms derived from Locally Linear Embedding (LLE) (Roweis and Sauk, 2000 [3]) and Affinity Propagation (AP) (Frey and Dueck, 2007 [4]) for organizing and clustering PCS. The LLE algorithm analyzes the cross-sections (PCS) using their geometric properties to build a global manifold in an embedded space. The AP algorithm, then clusters the local cross sections by propagating affinities among them in the embedded space to form different sweep components. We demonstrate the robustness and efficiency of the algorithms through many examples including actual laser-scanned (point cloud) mechanical parts.     

Maintaining dynamic sequences under equality tests in polylogarithmic time

We present a randomized and a deterministic data structure for maintaining a dynamic family of sequences under equality tests of pairs of sequences and creations of new sequences by joining or splitting existing sequences. Both data structures support equality tests inO(1) time. The randomized version supports new sequence creations inO(log² n) expected time wheren is the length of the sequence created. The deterministic solution supports sequence creations inO(logn(logmlog^* m+logn)) time for themth operation. This work was supported by the ESPRIT Basic Research Actions Program, under Contract No. 7141 (Project ALCOM II).     

Pipelined VLSI Architecture using CORDIC for Transform Domain Equalizer

In this paper, a pipelined architecture using CORDIC for realization of transform domain equalizer is presented. Transform domain equalizer has much faster convergence than its time domain counterpart for practical hardware realization having nonzero adaptation delay. Here running DFT is employed as the transform, and CORDIC is used for realization of running DFT. Pipelining is applied throughout the architecture, thus limiting the critical path delay to the propagation delay of a single 16 bit adder for 16 bit arithmetic. For N tap equalizer, primary clock speed is N times of the sample clock speed, so that on arrival of each sample, the computation of whole transform and weight update is possible. In the proposed architecture, hardware complexity is reduced by fully utilizing the pipeline without using parallel structures. The adaptation delay is only 2 sample clock periods resulting in fast convergence. The proposed architecture is suitable for VLSI implementation with primary clock speed limited by the binary adder propagation delay which could be as low as 2 ns in the present state-of-the-art technology.