An 8-bit, 200 MSPS Folding and Interpolating ADC

An 8-bit, 200 MSPS folding and interpolating analog-to-digitalconverter, ADC, has been implemented in a 1.2 µmBiCMOS-process. It achieves 7.5 effective bits with a power dissipationof 575mW. The active area is 4mm². The implementationand measured results are presented. A simple analytical modelfor the interpolation-induced nonlinearity in a folding and interpolatingADC using sinusoidal folding is presented. The bowing of thereference ladder due to interaction with the input stages isanalyzed, and analytical models are derived.     

Analysis of aperture blockage in reflector antennas by usingobstacle-located blockage currents

An improved method is presented to account for blockage effects in the analysis of reflector antennas. Commonly this is done by introducing shadows on the reflector surface according to the location of the obstacles when performing the physical optics integration. By using physical optics blockage currents located at the blocking obstacle instead of at the main reflector surface, the effect of the different locations in the axial direction is accurately accounted for. This can easily be included by a single phase factor in existing computer programs based on physical optics integration     

Analysis of nearly cylindrical antennas and scattering problemsusing a spectrum of two-dimensional solutions

This paper presents a powerful method for analysing antennas which can be considered principally two-dimensional (2-D) or cylindrical, except for some three-dimensional (3-D) physical or equivalent sources, e.g., dipoles or slots. It is shown by Fourier transform techniques that such antennas can be analyzed as 2-D problems with harmonic longitudinal field variation. The radiation pattern can often be determined directly from a finite set of such 2-D solutions, each one obtained by any method, e.g., the moment method. The mutual interaction between the cylindrical scatterer and the sources must be calculated to determine the exact current distribution on the sources and their impedances or admittances. This is facilitated by performing an inverse Fourier transform of an infinite spectrum of the numerical 2-D solutions followed by a moment method solution in the spatial domain to satisfy the boundary conditions on the 3-D equivalent sources themselves. The inverse Fourier transform is simplified by the use of asymptote extraction. The method is in itself a hybrid technique as one method is used to solve the harmonic 2-D problem, and the other to solve for the source currents     

A Compact 3V, 70mW, 12-bit Video-Speed CMOS ADC

A 12-bit video speed pipelined switched capacitor analog-to-digitalconverter (ADC) has been implemented in a 0.5 µmstandard CMOS process. It operates from a single 2.6–;3.3Vsupply, dissipates 23mA (independent of supply voltage) at 20MSPS and occupies only 1.1mm ². A 61dB SINAD (f_in = 4.5 MHz) and an effective resolution bandwidthof 9 MHz is achieved.     

A cost-efficient high-speed 12-bit pipeline ADC in 0.18-/spl mu/m digital CMOS

A 12-bit pipeline ADC fabricated in a 0.18-/spl mu/m pure digital CMOS technology is presented. Its nominal conversion rate is 110 MS/s and the nominal supply voltage is 1.8 V. The effective number of bits is 10.4 when a 10-MHz input signal with 2V/sub P-P/ signal swing is applied. The occupied silicon area is 0.86 mm/sup 2/ and the power consumption equals 97 mW. A switched capacitor bias current generator scales the opamp bias currents automatically with the conversion rate, which gives scaleable power consumption and full performance of the ADC from 20 to 140 MS/s.