首页 | 官方网站   微博 | 高级检索  
文章检索
  按 检索   检索词:      
出版年份:   被引次数:   他引次数: 提示:输入*表示无穷大
  收费全文   173篇
  免费   11篇
  国内免费   2篇
工业技术   186篇
  2024年   3篇
  2023年   1篇
  2022年   8篇
  2021年   16篇
  2020年   14篇
  2019年   15篇
  2018年   21篇
  2017年   12篇
  2016年   16篇
  2015年   4篇
  2014年   9篇
  2013年   8篇
  2012年   5篇
  2011年   6篇
  2010年   6篇
  2009年   8篇
  2008年   5篇
  2007年   5篇
  2006年   7篇
  2005年   5篇
  2004年   4篇
  2003年   1篇
  2000年   1篇
  1998年   2篇
  1997年   2篇
  1995年   1篇
  1994年   1篇
排序方式: 共有186条查询结果,搜索用时 15 毫秒
1.
In this study, solvent‐free nanofibrous electrolytes were fabricated through an electrospinning method. Polyethylene oxide (PEO), lithium perchlorate and ethylene carbonate were used as polymer matrix, salt and plasticizer respectively in the electrolyte structures. Keggin‐type hetero polyoxometalate (Cu‐POM@Ru‐rGO, Ni‐POM@Ru‐rGO and Co‐POM@Ru‐rGO (POM, polyoxometalate; rGO, reduced graphene oxide)) nanoparticles were synthesized and inserted into the PEO‐based nanofibrous electrolytes. TEM and SEM analyses were carried out for further evaluation of the synthesized filler structures and the electrospun nanofibre morphologies. The fractions of free ions and crystalline phases of the as‐spun electrolytes were estimated by obtaining Fourier transform infrared and XRD spectra, respectively. The results showed a significant improvement in the ionic conductivity of the nanofibrous electrolytes by increasing filler concentrations. The highest ionic conductivity of 0.28 mS cm?1 was obtained by the introduction of 0.49 wt% Co‐POM@Ru‐rGO into the electrospun electrolyte at ambient temperature. Compared with solution‐cast polymeric electrolytes, the electrospun electrolytes present superior ionic conductivity. Moreover, the cycle stability of the as‐spun electrolytes was clearly improved by the addition of fillers. Furthermore, the mechanical strength was enhanced with the insertion of 0.07 wt% fillers to the electrospun electrolytes. The results implied that the prepared nanofibres are good candidates as solvent‐free electrolytes for lithium ion batteries. © 2020 Society of Chemical Industry  相似文献   
2.
This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating the ground bounce is presented. The proposed method relies on accurate models of the short-channel MOS device and the chip-package interface parasitics. Next the effect of ground bounce on the propagation delay and the optimum tapering factor of a multistage buffer is discussed and a mathematical relationship for total propagation delay in the presence of the ground bounce is obtained. Effect of an on-chip decoupling capacitor on the ground bounce waveform and circuit speed is analyzed next and a closed form expression for the peak value of the differential-mode component of the ground bounce in terms of the on-chip decoupling capacitor is provided. Finally, a design methodology for controlling the switching times of the output drivers to minimize the ground bounce is presented.  相似文献   
3.
Analysis of the PLL jitter due to power/ground and substrate noise   总被引:1,自引:0,他引:1  
Phase-locked loops (PLL) in radio-frequency (RF) and mixed analog-digital integrated circuits (ICs) experience substrate coupling due to the simultaneous circuit switching and power/ground (P/G) noise which translate to a timing jitter. In this paper. an analysis of the PLL timing jitter due to substrate noise resulting from P/G noise and large-signal switching is presented. A general comprehensive stochastic model of the substrate and P/G noise sources in very large-scale integration (VLSI) circuits is proposed. This is followed by calculation of the phase noise of the constituent voltage-controlled oscillator (VCO) in terms of the statistical properties of substrate and P/G noise. The PLL timing jitter is then predicted in response to the VCO phase noise. Our mathematical method is utilized to study the jitter-induced P/G noise in a CMOS PLL, which is designed and simulated in a 0.25-/spl mu/m standard CMOS process. A comparison between the results obtained by our mathematical model and those obtained by HSPICE simulation prove the accuracy of the predicted model.  相似文献   
4.
Engineering with Computers - In this article, the 2D Chebyshev wavelets (CWs) are used for designing a proper procedure to solve the variable-order (VO) fractional version of the nonlinear...  相似文献   
5.
Engineering with Computers - This paper introduces a new version for the nonlinear Ginzburg–Landau equation derived from fractal–fractional derivatives and proposes a computational...  相似文献   
6.
In real scheduling problems, some disruptions and unexpected events may occur. These disruptions cause the initial schedule to quickly become infeasible and non-optimal. In this situation, an appropriate rescheduling method should be used. In this paper, a new approach has been proposed to achieve stable and robust schedule despite uncertain processing times and unexpected arrivals of new jobs. This approach is a proactive–reactive method which uses a two-step procedure. In the first step an initial robust solution is produced proactively against uncertain processing times using robust optimization approach. This initial robust solution is more insensitive against the fluctuations of processing times in future. In the next step, when an unexpected disruption occurs, an appropriate reactive method is adopted to deal with this unexpected event. In fact, in the second step, the reactive approach determines the best modified sequence after any unexpected disruption based on the classical objective and performance measures. The robustness measure is implemented in the reactive approach to increase the performance of the real schedule after disruption. Computational results indicate that this method produces better solutions in comparison with four classical heuristic approaches according to effectiveness and performance of solutions.  相似文献   
7.
Engineering with Computers - In this study, the Caputo-Fabrizio fractional derivative is applied to generate a new category of variable-order fractional 2D optimization problems in an unbounded...  相似文献   
8.
Engineering with Computers - In this study, a new fractal-fractional (FF) derivative is defined by coupling the local conformable derivative and non-local Caputo fractional derivative. Using the...  相似文献   
9.
International Journal of Control, Automation and Systems - In this paper, an on-line gait control scheme is proposed for the biped robots for walking up and down the stairs. In the proposed...  相似文献   
10.
This brief presents the design and implementation of a 40-GHz flip-flop-based frequency divider which incorporates a novel latch topology with two distinct tail current sources and an enabled cross-coupled pair during the tracking mode. The proposed topology will speed up the latch operation and increase the driving capability. It is capable of performing frequency division at 40 GHz without shunt or series peaking inductors. The circuit was fabricated in a 0.18-mum SiGe BiCMOS process, where only CMOS transistors were used. It draws an average current of 5 mA from a 1.8-V supply voltage  相似文献   
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司    京ICP备09084417号-23

京公网安备 11010802026262号