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This paper presents post-layout simulated results of an analog baseband chain for mobile and multimedia applications in a 0.13-μm SiGe BiCMOS process.A programmable 7th-order Chebyshev low pass filter with a calibration circuit is used in the analog baseband chain,and the programmable bandwidth is 1.8/2.5/3/3.5/4 MHz with an attenuation of 26/62 dB at offsets of 1.25/4 MHz.The baseband programmable gain amplifier can achieve a linear 40-dB gain range with 0.5-dB steps.Design trade-offs are carefully considered in designing the baseband circuit,and an automatic calibration circuit is used to achieve the bandwidth accuracy of 2%.A DC offset cancellation loop is also introduced to remove the offset from the layout and self-mixing,and the remaining offset voltage is only 1.87 mV.Implemented in a 0.13-μm SiGe technology with a 0.6-mm~2 die size,this baseband achieves IIP3 of 23.16 dBm and dissipates 22.4 mA under a 2.5-V supply. 相似文献
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This paper presents post-layout simulated results of an analog baseband chain for mobile and multimedia applications in a 0.13-μm SiGe BiCMOS process.A programmable 7th-order Chebyshev low pass filter with a calibration circuit is used in the analog baseband chain,and the programmable bandwidth is 1.8/2.5/3/3.5/4 MHz with an attenuation of 26/62 dB at offsets of 1.25/4 MHz.The baseband programmable gain amplifier can achieve a linear 40-dB gain range with 0.5-dB steps.Design trade-offs are carefully cons... 相似文献
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针对ISO 18000-6C标准,提出一种双电压输出稳压电路,有效降低了整体芯片功耗。基于Cadence Spectre设计仿真平台和TSMC 0.18μm CMOS混合信号工艺进行设计并流片。在-20℃~80℃温度范围内,工艺角从ff到ss变化,仿真得到整流电路的能量转换效率(PCE)为29.88%,稳压电路的温度系数为2.4×10-5/℃,电源噪声抑制比(PSRR)为91.4dB@10Hz和34.5dB@10MHz。同时对芯片进行测试,标签可以工作的最低输入射频功率为-9.5dBm,此时整流效率可达23.1%,稳压高低两路电压输出分别稳定在1.8±0.1V和1.0±0.05V,芯片面积约为0.166mm2。 相似文献
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