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1.
Abstract

Lung deposited surface area (LDSA) is a relatively new metric that has been argued to be more accurate at predicting health effects from aerosol exposure. For typical atmospheric aerosol, the LDSA concentration depends mainly on the concentration of ultrafine particles (e.g. vehicular exhaust emissions and residential wood combustion) and therefore optical methods cannot be used to measure and quantify it. The objective of this study was to investigate and describe typical characteristics of LDSA under different urban environments and evaluate how a diffusion charging-based Pegasor AQ Urban sensor (Pegasor Ltd., Finland) can be used as an alternative to optical sensors when assessing local combustion emissions and respective LDSA concentrations. Long-term (12?months) sensor measurements of LDSA were carried out at three distinctly different measurement sites (four sensor nodes) in the Helsinki metropolitan area, Finland. The sites were affected mainly by vehicular exhaust emission (street canyon and urban background stations) and by residential wood combustion (two detached housing area stations). The results showed that the accuracy of the AQ Urban was good (R2 = 0.90) for the measurement of LDSA when compared to differential mobility particle sizer. The mean concentrations of LDSA were more than twice as high at the street canyon (mean 22 µm2 cm?3) site when compared to the urban background site (mean 9.4 µm2 cm?3). In the detached housing area, the mean concentrations were 12 µm2 cm?3, and wood combustion typically caused high LDSA peaks in the evenings. High correlations and similar diurnal cycles were observed for the LDSA and black carbon at street canyon and urban background stations. The utilization of a small-scale sensor network (four nodes) showed that the cross-station variability in hourly LDSA concentrations was significant in every site, even within the same detached housing area (distance between the two sites ~670?m).  相似文献   
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Applications of the additive accumulation of damages (AAD) or the accelerated failure time (AFT) and the proportional hazards (PH) models in accelerated life testing with step-stresses are discussed. A new model including AAD and PH models is proposed. It is more reasonable than the PH model and wider then the AAD model. Constructing the maximum likelihood function is discussed  相似文献   
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Nikulin  R. G.  Shchitsyn  Yu. D.  Krivonosova  E. A.  Zagrebin  D. S.  Hassel  T. 《Metallurgist》2022,65(11-12):1401-1412
Metallurgist - Results are provided for studying formation of the structure and properties of products made of high-strength light alloy ML5 of the magnesium-aluminum-manganese-zinc system using...  相似文献   
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The structure, phase composition, and thermal stability of the industrial zirconium alloys, namely, E110 (Zr–1% Nb) and E635 (Zr–1% Nb–0.3% Fe–1.2% Sn), which are subjected to high‐pressure torsion (HPT) at room temperature (RT), 200, and 400 °С have been studied. HPT of Zr‐alloys at RT (10 revolutions) leads to the formation of grain–subgrain nano‐sized structure and to increase the microhardness by 2.1…2.8 times. The increase in the HPT temperature to 200–400 °С leads to the increase in the structural‐element average size. The structural‐element size in the complexly alloyed E635 alloy in all cases is lower compared with the E110 alloy. The hardening of the alloys after HPT at RT and 200 °С is close, and at 400 °С is much less. HPT initiates the α‐Zr → (ω‐Zr + β‐Zr) transformation, which is the main factor for alloys hardening. The α‐Zr → (ω‐Zr + β‐Zr) transformation in the E635 alloy occurs less quickly. The maximum amount (ω‐Zr + β‐Zr) phase in the structure of the alloys is observed after HPT at RT and 200 °C, and the minimum ? at 400 °C. During heating, the alloys undergo the reverse (ω‐Zr + β‐Zr) → α transformation which depends on both the alloy composition and HPT temperature.
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Preface     
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The BOAR emulation system is targeted to hardware/software (HW/SW) codevelopment of advanced embedded DSP and telecom systems. The challenge of the BOAR system is efficient customization of programmable hardware, and dedicated partitioning routine to target applications and structures, which allows quite high overall system performance. The system allows multiple configurations for communication between processors and field programmable gate arrays (FPGAs) making the BOAR system an efficient tool for real-time HW/SW coverification. The reprogrammable hardware of the emulation tool is based on four Xilinx 4000-series devices, two Texas TMS320C50 signal processors and one Motorola MC68302 microcontroller. With current devices the BOAR hardware provides approximately 40–70 kgates of logic capacity in DSP applications. The emulation capacity can be expanded by connecting several similar boards in chain. The system has also a versatile internal reprogrammable test environment for test bench development, performance evaluations and design debugging. The logic development environment is based on the Synopsys synthesis tools and an automatic design management software, which performs resource mapping and performance-driven design partitioning between FPGAs. The emulation hardware is currently connected to logic and software development environments via an RS-232C bus. The BOAR emulation system has been found a very efficient platform for real-life prototyping of different types of DSP algorithms and systems, and validating correct functionality of a VHDL macro library.  相似文献   
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