Mass transfer in polycrystalline ytterbium monosilicate under oxygen potential gradients at high temperatures

Mass transfer in polycrystalline Yb₂SiO₅ wafers with precise composition control was evaluated and analyzed by oxygen permeation experiments at high temperatures using an oxygen tracer. Oxygen permeation proceeded due to mutual grain boundary diffusion of oxide ions and Yb ions without synergistic effects such as acceleration or suppression. The oxygen shielding properties of Yb₂SiO₅ were compared with those of the other line compounds such as Yb₂Si₂O₇ and Al₂O₃ based on the determined mass transfer parameters. It was found that the more preferentially an oxide ion diffuses in the grain boundary compared to the interior of the grain, the greater the effect of suppressing the movement of the oxide ion by applying an oxygen potential gradient becomes.     

Theoretical estimation of dielectric loss of oxide glasses using nonequilibrium molecular dynamics simulations

To theoretically explore amorphous materials with a sufficiently low dielectric loss, which are essential for next-generation communication devices, the applicability of a nonequilibrium molecular dynamics simulation employing an external alternating electric field was examined using alkaline silicate glass models. In this method, the dielectric loss is directly evaluated as the phase shift of the dipole moment from the applied electric field. This method enabled us to evaluate the dielectric loss in a wide frequency range from 1 GHz to 10 THz. It was observed that the dielectric loss reaches its maximum at a few THz. The simulation method was found to qualitatively reproduce the effects of alkaline content and alkaline type on the dielectric loss. Furthermore, it reasonably reproduced the effect of mixed alkalines on the dielectric loss, which was observed in our experiments on sodium and/or potassium silicate glasses. Alkaline mixing was thus found to reduce the dielectric loss.     

High-resolution long-array thermal ink jet printhead fabricated by anisotropic wet etching and deep Si RIE

This paper describes the fabrication and characterization of a thermal ink jet (TIJ) printhead suitable for high speed and high-quality printing. The printhead has been fabricated by dicing the bonded wafer, which consists of a bubble generating heater plate and a Si channel plate. The Si channel plate consists of an ink chamber and an ink inlet formed by KOH etching, and a nozzle formed by inductively couple plasma reactive ion etching (ICP RIE). The nozzle formed by RIE has squeezed structures, which contribute to high-energy efficiency of drop ejector and, therefore, successful ejection of small ink drop. The nozzle also has a dome-like structure called channel pit, which contributes to high jetting frequency and high-energy efficiency. These two wafers are directly bonded using electrostatic bonding of full-cured polyimide to Si. The adhesive-less bonding provided an ideal shaped small nozzle orifice. Use of the same material (Si substrate) in heater plate and channel plate enables the fabrication of high precision long printhead because no displacement and delamination occur, which are caused by the difference in thermal expansion coefficient between the plates. With these technologies, we have fabricated a 1" long printhead with 832 nozzles having 800 dots per inch (dpi) resolution and a 4 pl. ink drop volume.     

4*4 directional coupler switch matrix with an InGaAlAs/InAlAs multiquantum well structure

A 4*4 directional coupler switch matrix is developed which uses, for the first time, the quantum confined Stark effect of InGaAlAs/InAlAs multiquantum well structures. The rearrangeable nonblocking 4*4 network with six 2*2 switches is shown to be perfectly functional with switching voltages between 5 and 6 V and crosstalk below -17 dB in all the operation states.<>     

Direct observation of the crystal-growth transition in undercooled silicon

Using an electromagnetic levitation facility with a laser heating unit, silicon droplets were highly undercooled in the containerless state. The crystal morphologies on the surface of the undercooled droplets during the solidification process and after solidification were recorded live by using a high-speed camera and were observed by scanning electron microscopy. The growth behavior of silicon was found to vary not only with the nucleation undercooling, but also with the time after nucleation. In the earlier stage of solidification, the silicon grew in lateral, intermediary, and continuous modes at low, medium, and high undercoolings, respectively. In the later stage of solidification, the growth of highly undercooled silicon can transform to the lateral mode from the nonlateral one. The transition time of the sample with 320 K of undercooling was about 535 ms after recalescence, which was much later than the time where recalescence was completed.     

Containerless solidification of highly undercooled mullite melts: Crystal growth behavior and microstructure formation

A mullite (3Al₂O₃·2SiO₂) sample has been levitated and undercooled in an aero-acoustic levitator, so as to investigate the solidification behavior in a containerless condition. Crystal-growth velocities are measured as a function of melt undercoolings, which increase slowly with melt undercoolings up to 380 K and then increase quickly when undercoolings exceed 400 K. In order to elucidate the crystal growth and solidification behavior, the relationship of melt viscosities as a function of melt undercoolings is established on the basis of the fact that molten mullite melts are fragile, from which the atomic diffusivity is calculated via the Einstein-Stokes equation. The interface kinetics is analyzed when considering atomic diffusivities. The crystal-growth velocity vs melt undercooling is calculated based on the classical rate theory. Interestingly, two different microstructures are observed; one exhibits a straight, faceted rod without any branching with melt undercoolings up to 400 K, and the other is a feathery faceted dendrite when undercoolings exceed 400 K. The formation of these morphologies is discussed, taking into account the contributions of constitutional and kinetic undercoolings at different bulk undercoolings.     

Tri-Gate Bulk MOSFET Design for CMOS Scaling to the End of the Roadmap

A tri-gate bulk MOSFET design utilizing a low-aspect-ratio channel is proposed to provide an evolutionary pathway for CMOS scaling to the end of the roadmap. 3-D device simulations indicate that this design offers the advantages of a multi-gate FET (reduced variability in performance and improved scalability) together with the advantages of a conventional planar MOSFET (low substrate cost and capability for dynamic threshold-voltage control).     

Hardware system of the Earth Simulator

The Earth Simulator (ES), developed under the Japanese government’s initiative “Earth Simulator project”, is a highly parallel vector supercomputer system. In this paper, an overview of ES, its architectural features, hardware technology and the result of performance evaluation are described.

In May 2002, the ES was acknowledged to be the most powerful computer in the world: 35.86 teraflop/s for the LINPACK HPC benchmark and 26.58 teraflop/s for an atmospheric general circulation code (AFES). Such a remarkable performance may be attributed to the following three architectural features; vector processor, shared-memory and high-bandwidth non-blocking interconnection crossbar network.

The ES consists of 640 processor nodes (PN) and an interconnection network (IN), which are housed in 320 PN cabinets and 65 IN cabinets. The ES is installed in a specially designed building, 65 m long, 50 m wide and 17 m high. In order to accomplish this advanced system, many kinds of hardware technologies have been developed, such as a high-density and high-frequency LSI, a high-frequency signal transmission, a high-density packaging, and a high-efficiency cooling and power supply system with low noise so as to reduce whole volume of the ES and total power consumption.

For highly parallel processing, a special synchronization means connecting all nodes, Global Barrier Counter (GBC), has been introduced.     

Growth of Potassium Titanate Fibers in Flowing N2 Gas

The length of potassium titanate fibers produced by several conventional methods averages 50 μm, with a maximum of 100 μm. Extremely long fibers (most >1000 μm long) were obtained by calcination in N₂ gas flowing at 5.2×10^-4 m/s.     

A 322 MHz random-cycle embedded DRAM with high-accuracy sensing and tuning

A 16 Mb embedded DRAM macro in a fully CMOS logic compatible 90 nm process with a low noise core architecture and a high-accuracy post-fabrication tuning scheme has been developed. Based on the proposed techniques, 61% improvement of the sensing accuracy is realized. Even with the smallest 5 fF/cell capacitance, a 322 MHz random-cycle access while 32 ms data retention time which contributes to save the data retention power down to 60 /spl mu/W are achieved.