Complexity‐Reduced Algorithms for LDPC Decoder for DVB‐S2 Systems

This paper proposes two kinds of complexity‐reduced algorithms for a low density parity check(LDPC) decoder. First, sequential decoding using a partial group is proposed. It has the same hardware complexity and requires a fewer number of iterations with little performance loss. The amount of performance loss can be determined by the designer, based on a tradeoff with the desired reduction in complexity. Second, an early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Once the edges are detected, no further iteration is required; thus early detection reduces the computational complexity.     

Design and Architecture of Low‐Latency High‐Speed Turbo Decoders

In this paper, we propose and present implementation results of a high‐speed turbo decoding algorithm. The latency caused by (de)interleaving and iterative decoding in a conventional maximum a posteriori turbo decoder can be dramatically reduced with the proposed design. The source of the latency reduction is from the combination of the radix‐4, center to top, parallel decoding, and early‐stop algorithms. This reduced latency enables the use of the turbo decoder as a forward error correction scheme in real‐time wireless communication services. The proposed scheme results in a slight degradation in bit error rate performance for large block sizes because the effective interleaver size in a radix‐4 implementation is reduced to half, relative to the conventional method. To prove the latency reduction, we implemented the proposed scheme on a field‐programmable gate array and compared its decoding speed with that of a conventional decoder. The results show an improvement of at least five fold for a single iteration of turbo decoding.     

Wireless-adaptive fair scheduling for multimedia stream

As packet cellular networks are expected to support multimedia services, the authors incorporate the multimedia QoS requirements into the design of a new scheduling algorithm. The proposed wireless-adaptive fair scheduling tries to allocate time slots for each user with fair share by considering the varying channel condition while reflecting the stream requirements and achieving high throughput.     

Simultaneous amplification by Er ions and SRS in an Er-doped germano-silica fiber

A flat signal gain over in the entire C- and L-bands by erbium (Er) ions' radiative transition and stimulated Raman scattering in an Er-doped germano-silica fiber can be obtained if proper values of the concentration of Er and background loss in a fiber core are obtained during the fiber fabrication process. The optimized conditions for the flat C- and L-band gain are analyzed as functions of Er concentrations. Even for a low-gain value provided by a germano-silica core fiber with a low Er concentration and an optimum fiber length, a relatively low pump is required to obtain the flat gain band.     

Relationship between ADC performance and requirements of digital-IF receiver for WCDMA base-station

The recent rapid development of digital wireless systems has led to the need for multistandard, multichannel radiofrequency (RF) transceivers. The paper presents the relationship between the performance of a bandpass-sampling analog-to-digital converter (ADC) and the requirements of a digital intermediate-frequency receiver for a wideband code-division multiple-access (WCDMA) base-station. As such, the ADC signal-to-noise ratio (SNR), the derivation of the receiver sensitivity using the SNR/spurious free dynamic range (SFDR) of the ADC, the effect of the ADC clock jitter and receiver linearity, plus the relationship between the receiver IF and the ADC sampling frequency are all analyzed. As a result, when a WCDMA base-station receiver has a data rate of 12.2 kbps, bit error rate (BER) of 0.001, and channel index, k, of 5 (sampling frequency of 122.88 MHz and IF of 92.16 MHz), the performance of a bandpass-sampling ADC was analytically determined to require a resolution of 14 bits or more, SNR of 66.6 dB or more, SFDR of 86.5 dBc or more, and total jitter of 0.2 ps or less, including internal ADC jitters and clock jitters.     

A new method for pHEMT noise-parameter determination based on 50-/spl Omega/ noise measurement system

A new method for determining the four noise parameters of pseudomorphic high electron-mobility transistors (pHEMTs) based on a 50-/spl Omega/ noise measurement system without a microwave tuner is presented. The noise parameters are determined based on the noise correlation matrix technique by fitting the measured noise figure of the active device. On-wafer experimental verification up to 26 GHz is presented and a comparison with a tuner-based method is given. The scaling rules for noise parameters have also been determined. Good agreement is obtained between simulated and measured results for 2/spl times/20 /spl mu/m, 2/spl times/40 /spl mu/m, and 2/spl times/60 /spl mu/m gatewidth (number of gate fingers /spl times/ unit gatewidth) 0.25-/spl mu/m double-heterojunction /spl delta/-doped pHEMTs.     

2.4 GHz continuously variable ferroelectric phase shifters using all-pass networks

Continuously variable ferroelectric (BST on sapphire) phase shifters based on all-pass networks are presented. An all-pass network phase shifter consists of only lumped LC elements, and thus the total size of the phase shifter is kept to less than 2.2 mm /spl times/ 2.6 mm at 2.4 GHz. The tunability (C/sub max//C/sub min/) of a BST interdigital capacitor is over 2.9 with a bias voltage of 140 V. The phase shifter provides more than 121/spl deg/ phase shift with the maximum insertion loss of 1.8 dB and the worst case return loss of 12.5 dB from 2.4 GHz to 2.5 GHz. By cascading two identical phase shifters, more than 255/spl deg/ phase shift is obtained with the maximum insertion loss of 3.75 dB. The loss figure-of-merit of both the single- and double-section phase shifters is over 65/spl deg//dB from 2.4 GHz to 2.5 GHz.     

Spectrally stable Er-fiber laser for application in phase-sensitive optical time-domain reflectometry

A high degree of frequency stability in an Er-fiber laser with the Fabry-Perot configuration was achieved using a long (25-km) optical-feedback loop. The frequency-drift rate was determined to be <1 MHz/min by observing temporal fringes in an unbalanced Mach-Zehnder interferometer. Instantaneous linewidth measured with a delayed self-heterodyne interferometer was less than the 3-kHz resolution limit. The laser was utilized in an optical time-domain reflectometry experiment to detect and locate a time-varying phase perturbation applied to an optical fiber.     

Fabrication and performance of parallel-addressed InGaN micro-LED arrays

High-performance, two-dimensional arrays of parallel-addressed InGaN blue micro-light-emitting diodes (LEDs) with individual element diameters of 8, 12, and 20 /spl mu/m, respectively, and overall dimensions 490 /spl times/490 /spl mu/m, have been fabricated. In order to overcome the difficulty of interconnecting multiple device elements with sufficient step-height coverage for contact metallization, a novel scheme involving the etching of sloped-sidewalls has been developed. The devices have current-voltage (I-V) characteristics approaching those of broad-area reference LEDs fabricated from the same wafer, and give comparable (3-mW) light output in the forward direction to the reference LEDs, despite much lower active area. The external efficiencies of the micro-LED arrays improve as the dimensions of the individual elements are scaled down. This is attributed to scattering at the etched sidewalls of in-plane propagating photons into the forward direction.     

Adaptive random access and resource allocation scheme based on traffic load in HiperLAN type2 system

The MAC protocol of HiperLAN type2 is based on TDMA/TDD and provides access control and resource allocation schemes. We propose a scheme that provides adaptive random access and efficient resource allocation according to the traffic load for HiperLAN type2, by using access probability. The analysis and simulation results show that the proposed scheme performs better than the conventional scheme and supports priority services easily.