Polygonal extrusion

A sweeping operation called polygonal extrusion is defined to improve the modeling power of CSG-based modeling. It is assumed that a 2D cross-sectional polygon (sweeping polygon) moves in space while its containing plane is kept orthogonal to the tangent direction of the trajectory curve, a planar polygonal chain having no self-intersections. The objective of the paper is to compute the boundary of the swept volume of the sweeping polygon as a set of polygons (or triangles). The most significant challenge to accomplishing this objective is the problem of trimming the swept volume. To solve the trimming problem, 2D-curve offsetting methods are employed. Two algorithms are presented for polygonal extrusion that are based on different offsetting methods, the Voronoi diagram and PWID offset. The proposed algorithms have been implemented and tested with various examples. Published online: 28 January 2003     

A tolerant approach to reconstruct topology from unorganized trimmed surfaces

Presented in this paper is a topology reconstruction algorithm from a set of unorganized trimmed surfaces. Error-prone small geometric elements are handled to give proper topological information. It gives complete topology to topologically complete models, and it is also tolerant to incomplete models. The proposed algorithm is vertex-based in that clues for topological information are searched from the set of vertices first, not from that of edges.     

Austenitizing treatment influence on the electrochemical corrosion behavior of 0.3C-14Cr-3Mo martensitic stainless steel

Effects of austenitizing treatment temperatures on aqueous corrosion properties of martensitic stainless steels were investigated by electrochemical tests (potentiodynamic test, potentiostatic test and electrochemical impedance spectroscopy), and surface analyses (optical microscopy and XRD). The results of potentiodynamic test revealed that the breakdown potential increased with the increased austenitizing temperature, indicating increased relative resistance to initiation of localized corrosion. EIS measurements showed that MSS3 (1030 °C) exhibits larger polarization resistance value than MSS1 (970 °C) and MSS2 (1000 °C) at passive and breakdown states. This was caused by decreasing the amount of Cr-rich M₂₃C₆ carbide which acts as preferential sites for pitting corrosion.     

Category Norms as a Function of Culture and Age: Comparisons of Item Responses to 105 Categories by American and Chinese Adults.

Understanding how aging influences cognition across different cultures has been hindered by a lack of standardized, cross-referenced verbal stimuli. This study introduces a database of such item-level stimuli for both younger and older adults, in China and the United States, and makes 3 distinct contributions. First, the authors specify which item categories generalize across age and/or cultural groups, rigorously quantifying differences among them. Second, they introduce novel, powerful methods to measure between-group differences in freely generated ranked data, the rank-ordered logit model and Hellinger Affinity. Finally, a broad archive of tested, cross-linguistic stimuli is now freely available to researchers: data, similarity measures, and all stimulus materials for 105 categories and 4 culture-by-age groups, comprising over 10,000 fully translated unique item responses. (PsycINFO Database Record (c) 2010 APA, all rights reserved)     

Trenched‐Sinker LDMOSFET (TS‐LDMOS) Structure for 2 GHz Power Amplifiers

This paper proposes a new LDMOSFET structure with a trenched sinker for high‐power RF amplifiers. Using a low‐temperature, deep‐trench technology, we succeeded in drastically shrinking the sinker area to one‐third the size of the conventional diffusion‐type structure. The RF performance of the proposed device with a channel width of 5 mm showed a small signal gain of 16.5 dB and a maximum peak power of 32 dBm with a power‐added efficiency of 25% at 2 GHz. Furthermore, the trench sinker, which was applied to the guard ring to suppress coupling between inductors, showed an excellent blocking performance below ?40 dB at a frequency of up to 20 GHz. These results confirm that the proposed trenched sinker should be an effective technology both as a compact sinker for RF power devices and as a guard ring against coupling.     

Data retention characteristics of sub-100 nm NAND flash memory cells

In contrast to the conventional theories, we have revealed that the most distinguished mechanism in the data retention phenomenon after Fowler-Nordheim (FN) stress in sub-100 nm NAND Flash memory cells is the annihilation of interface states. Interface state generation rate increases rapidly as the channel width of NAND flash cell decreases. Comparison of interface states and stress-induced leakage current (SILC) component during retention mode shows that the annihilation of interface states strongly affects data retention characteristics of the programmed cells.     

Catalytic dehydrogenation of ethylbenzene with carbon dioxide: promotional effect of antimony in supported vanadium–antimony oxide catalyst

Alumina-supported vanadium oxide, VO_x/Al₂O₃, and binary vanadium–antimony oxides, VSbO_x/Al₂O₃, have been tested in the ethylbenzene dehydrogenation with carbon dioxide and characterized by S_BET, X-ray diffraction, X-ray photoelectron spectroscopy, hydrogen temperature-programmed reduction and CO₂ pulse methods. VSbO_x/Al₂O₃ exhibited enhanced catalytic activity and especially on-stream stability compared to VO_x/Al₂O₃ catalyst. Incorporation of antimony into VO_x/Al₂O₃ increased dispersion of active VO_x species, enhanced redox properties of the systems and formed a new mixed vanadium–antimony oxide phase in the most catalytically efficient V_0.43Sb_0.57O_x/Al₂O₃ system.     

A new time-domain discontinuous space-vector PWM technique in overmodulation region

A new discontinuous modulation method based on space-vector control is proposed and analyzed. The proposed technique employs a pulse-dropping method and is designed in the time domain. It features a very wide modulation range while maintaining the required waveform qualities and switching numbers in the overmodulation region. Since the modulation method and modulation index equation are simple, the proposed technique can be easily implemented by software and is applicable to the overmodulation region in ac motor drives. The performance indexes are discussed and experiments have been performed.     

89-GHz fT room-temperature silicon MOSFETs

The authors report the implementation of deep-submicrometer Si MOSFETs that at room temperature have a unity-current-gain cutoff frequency (f_T) of 89 GHz, for a drain-to-source bias of 1.5 V, a gate-to-source bias of 1 V, a gate oxide thickness of 40 Å, and a channel length of 0.15 μm. The fabrication procedure is mostly conventional, except for the e-beam defined gates. The speed performance is achieved through an intrinsic transit time of only 1.8 ps across the active device region     

A practical SPICE model based on the physics and characteristics of realistic single-electron transistors

A practical model for a single-electron transistor (SET) was developed based on the physical phenomena in realistic Si SETs, and implemented into a conventional circuit simulator. In the proposed model, the SET current calculated by the analytic model is combined with the parasitic MOSFET characteristics, which have been observed in many recently reported SETs formed on Si nanostructures. The SPICE simulation results were compared with the measured characteristics of the Si SETs. In terms of the bias, temperature, and size dependence of the realistic SET characteristics, an extensive comparison leads to good agreement within a reasonable level of accuracy. This result is noticeable in that a single set of model parameters was used, while considering divergent physical phenomena such as the parasitic MOSFET, the Coulomb oscillation phase shift, and the tunneling resistance modulated by the gate bias. When compared to the measured data, the accuracy of the voltage transfer characteristics of a single-electron inverter obtained from the SPICE simulation was within 15%. This new SPICE model can be applied to estimating the realistic performance of a CMOS/SET hybrid circuit or various SET logic architectures.