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1.
This paper describes the conception and the development of a real-time data-acquisition system for prototype detectors of the Tracker being designed for the compact muon solenoid (CMS) experiment at the Large Hadron Collider of CERN, European Laboratory for Particle Physics, Geneva, Switzerland. The rationale for the development of a dedicated data-acquisition system was the need to perform two fundamental beam tests (the “Milestone Barrel 1” and “Milestone Forward 1”), with large-scale prototypes of the detectors planned as the baseline design. The number of readout channels, the complexity of the readout electronics, and the stringent requirements of the milestone tests mandated that a thorough understanding of the issues related to the physics of the detectors themselves be coupled with the application of leading-edge electronic and software engineering technologies. The implementation described in this paper is based on a distributed architecture. An event builder CPU handles the two main tasks of synchronizing a variable number of front-end processors and formatting the data in preparation for the transfer to a dedicated high-performance storage system, while the front-end processors handle the hardware and the real-time readout. Additional workstations are used to decouple the actual task of transferring the data files and monitoring the detector performance on-line from the readout farm. The system has been successfully operated during the two aforementioned Milestone tests, allowing the CMS Tracker collaboration to pass them, with the simultaneous readout of up to 40000 detector channels. The results of the two Milestones have led to the compilation of the “Tracker Technical Design Report”. Subsequently, the same readout system has been used for a number of other beam tests, and it has formed the basis for the development of further, more advanced data-acquisition systems for the new readout electronic of the CMS Tracker  相似文献   

2.
On the Compact Muon Solenoid (CMS) experiment for large hadron collider (LHC) at CERN laboratory, the drift tube chambers are responsible for muon detection and precise momentum measurement. In this paper the first level of the read out electronics for these drift tube chambers is described. These drift tube chambers will be located inside the muon barrel detector in the so-called minicrates (MCs), attached to the chambers. The read out boards (ROBs) are the main component of this first level data acquisition system, and they are responsible for the time digitalization related to Level 1 Accept (L1A) trigger of the incoming signals from the front-end electronics, followed by a consequent data merging to the next stages of the data acquisition system. ROBs' architecture and functionality have been exhaustively tested, as well as their capability of operation beyond the expected environmental conditions inside the CMS detector. Due to the satisfactory results obtained, final production of ROBs and their assembly in the MCs has already started. A total amount of 250 MCs and approximately 1500 ROBs are being produced and tested thoroughly at CIEMAT (Spain). One set of tests, the burn-in tests, will guarantee ten years of limited maintenance operation. An overview of the system and a summary of the different results of the tests performed on ROBs and MCs will be presented. They include acceptance tests for the production chain as well as several validation tests that insure proper operation of the ROBs beyond the CMS detector conditions.  相似文献   

3.
The Trigger Supervisor is an online software system designed for the CMS experiment at CERN. Its purpose is to provide a framework to set up, test, operate and monitor the trigger components on one hand and to manage their interplay and the information exchange with the run control part of the data acquisition system on the other. The Trigger Supervisor is conceived to provide a simple and homogeneous client interface to the online software infrastructure of the trigger subsystems. The functional and nonfunctional requirements, the design, the operational details, and the components needed in order to facilitate a smooth integration of the trigger software in the context of CMS are described.  相似文献   

4.
The concentration preprocessing and fan-out(CPPF) system is one of the electronic subsystems of the upgraded Compact Muon Solenoid(CMS) Level-1 trigger system. It includes, in hardware, eight specially designed CPPF cards, one CMS card called AMC13, one commercial Micro-TCA Carrier HUB(MCH) card, and a MicroTCA shelf. Powerful online software is needed for the system, including providing reliable configuration and monitoring for the hardware, and a graphical interface for executing all actions and publishing monitoring messages.Further, to control and monitor the large amount of homogeneous hardware, the SoftWare Automating conTrol of Common Hardware(SWATCH) concept was proposed and developed. The SWATCH provides a generic structure and is flexible for customization. The structure includes a hardware access library based on the IPbus protocol, which assumes a virtual 32-bit address/32-bit data bus and builds a simple hardware access layer. Furthermore, the structure provides a graphical user interface, which is based on modern web technology and is accessible by web page. The CPPF controlling and monitoring online software was also customized from a common SWATCH cell, and provides afinite state machine(FSM) for configuring the entire CPPF hardware, and five monitoring objects for periodically collecting monitoring data from five main functional modules in the CPPF hardware. This paper introduces the details of the CPPF SWATCH cell development.  相似文献   

5.
高密度塑料闪烁体探测器的数据获取系统设计   总被引:1,自引:1,他引:0  
由中国科学院近代物理研究所承担的塑料闪烁体探测器研究项目,其目标是开展空间粒子探测、重构入射电子轨迹、区分电子和光子、鉴别重离子。为配合该探测器测试工作,设计了一套完备的数据获取电路(DAQ)与上位机软件。DAQ接收4块前端电子学(FEE)板的数据,可完成360路电子学通道的数据读出;接收上位机的控制命令并分发给各FEE;接收探测器的击中信息并产生触发信号;接收FEE的遥测数据并传给上位机。该DAQ与上位机通过USB总线和RS232总线实现实时通信。上位机软件基于LabWindows/CVI软件平台开发,实现对FEE电子学系统的控制、数据读取与保存,以及FEE系统运行状态参数信息的实时显示。该数据获取系统电路结构紧凑、功能完善,上位机软件具有良好的人机交互界面。经现场实际运行,DAQ与上位机软件满足设计要求,目前已成功应用于塑料闪烁体探测器读出电子学测试系统。  相似文献   

6.
Control and diagnostic tools for the event-filtering system (trigger) of the L3 experiment at the LEP (Large Electron Positron) collider have been implemented using an expert system. The structure and behavior of the trigger electronics has been modeled using the hybrid framework (allowing both frame-based design and rule-based reasoning) of the shell NEXPERT Object, which also provides a user friendly interface. An open architecture allows the integration in the system of conventional and widespread tools, like procedural languages and database management systems, and an easy interface to the whole online environment. The project goals, base model, development tools, and present implementation and future development of the trigger control are described  相似文献   

7.
PandaX-nT升级对电子学系统提出了诸多新的挑战,如更多的通道数、高速高精度的波形数字化、灵活的触发算法和更高的数据带宽要求等。本文介绍一种为未来PandaX-nT暗物质直接探测升级实验预研的读出电子学系统。该电子学系统主要由前置放大电路模块、波形数字化模块(FDM)、数据获取模块(DAQ)和时钟分发模块等组成。FDM集成8路14 bit@ 1 GS/s ADC,具有较高集成度,可实现对探测器信号波形数字化,并通过光纤与DAQ通信。DAQ可汇总多块FDM数据,实现全数字化的触发算法,并通过基于TCP协议的千兆以太网与计算机通信,保证了数据传输的可靠与稳定。目前已完成了整个读出电子学系统设计,并对整个电子学系统进行了功能验证,以及与探测器进行了初步的联合测试。整个电子学系统具有较高的可扩展性,并能实现更复杂的触发算法,能满足下一代升级的需求。  相似文献   

8.
This paper describes a feasibility study for the design of the muon trigger track finder processor in the high-energy physics experiment compact muon solenoid (CMS), planned for 2005, at CERN. It covers the specification, proposed method, and a prototype implementation. Comparison between several other measurement methods and the proposed one are carried out. The task of the processor is to identify muons and measure their transverse momenta and locations within 350 ns. It uses data from almost 200000 detector cells of drift tube muon chambers. The processor searches for muon tracks originating from the Interaction point by joining the track segments provided by the drift tube muon chamber electronics to full tracks. It assigns transverse momentum to each reconstructed track using the track's bend angle  相似文献   

9.
A readout electronics has been developed for the silicon strip array detector system of HIRFL-CSR-ETF.It consists of 48 front end electronics(FEE)boards,12 PXI-DAQ boards and one trigger board.It can implement energy and time measurements of 4608 channels.Each FEE board is based on 6 ASICs(ATHED),which implements energy and time measurements of 96 channels.The PXI-DAQ board meets requirements of high-speed counting and amount of readout channels and can process signals of 4 FEEs.The trigger board is developed to select the valid events.The energy linearity of the readout electronics is better than 0.3%in the dynamic range of 0.1-0.7V.In the test with a standard triple alpha source,the energy resolution was 1.8%at 5.48 MeV.This readout electronics enables the silicon strip array system to identify particles of A14.  相似文献   

10.
The distributed time-keeping and synchronization system(DTSS)underwent an upgrade for EAST during the last shutdown.The upgraded DTSS,designed based on PXI bus and reconfigurable I/O devices,synchronizes all other sub-systems by using a reference clock and trigger.It can produce a uniform clock up to 80 MHz,provide a delayed trigger from 1 ms to6872 s in 1 ms steps with 10 ns accuracy,and acquire the outputs of itself for self-inspection.The new DTSS was successfully applied in the 2012 spring EAST campaign,and has proven to be stable and reliable,giving an effective performance.The system structure and software development will be illustrated in detail in this paper.  相似文献   

11.
A bunch arrival-time monitor(BAM) system,based on electro-optical intensity modulation scheme, is under study at Shanghai Soft X-ray Free Electron Laser.The aim of the study is to achieve high-precision time measurement for minimizing bunch fluctuations. A readout electronics is developed to fulfill the requirements of the BAM system. The readout electronics is mainly composed of a signal conditioning circuit, field-programmable gate array(FPGA), mezzanine card(FMC150), and powerful FPGA carrier board. The signal conditioning circuit converts the laser pulses into electrical pulse signals using a photodiode. Thereafter, it performs splitting and low-noise amplification to achieve the best voltage sampling performance of the dual-channel analog-to-digital converter(ADC) in FMC150. The FMC150 ADC daughter card includes a 14-bit 250 Msps dual-channel high-speed ADC,a clock configuration, and a management module. The powerful FPGA carrier board is a commercial high-performance Xilinx Kintex-7 FPGA evaluation board. To achieve clock and data alignment for ADC data capture at a high sampling rate, we used ISERDES, IDELAY, and dedicated carry-in resources in the Kintex-7 FPGA. This paper presents a detailed development of the readout electronics in the BAM system and its performance.  相似文献   

12.
The CMS experiment is currently developing a computing system capable of serving, processing and archiving the large number of events that will be generated when the CMS detector starts taking data. During 2004 CMS undertook a large scale data challenge to demonstrate the ability of the CMS computing system to cope with a sustained data-taking rate equivalent to 25% of startup rate. Its goals were: to run CMS event reconstruction at CERN for a sustained period at 25 Hz input rate; to distribute the data to several regional centers; and enable data access at those centers for analysis. Grid middleware was utilized to help complete all aspects of the challenge. To continue to provide scalable access from anywhere in the world to the data, CMS is developing a layer of software that uses Grid tools to gain access to data and resources, and that aims to provide physicists with a user friendly interface for submitting their analysis jobs. This paper describes the data challenge experience with Grid infrastructure and the current development of the CMS analysis system.  相似文献   

13.
The Aleph data acquisition system is controlled by a set of protocols that are implemented both in software and on dedicated hardware. The authors describe these protocols, how they fulfil the design requirements, and the specific hardware supporting them. In particular, they give an overview of the Aleph readout and describe the readout controller, the transmission of trigger signals, the readout procedure, and the cable protocol. The authors discuss the requirements for partitioning Aleph, the topology constraints, and resource management. They detail the trigger supervisor, its functions, and the handling of errors  相似文献   

14.
Long pulse(of the order of 1000 s or more) SST-1 tokamak experiments demand a data acquisition system that is capable of acquiring data from various diagnostics channels without losing useful data(and hence physics information) while avoiding unnecessary generation of a large volume data.SST-1 Phase-1 tokamak operation has been envisaged with data acquisition of several essential diagnostics channels.These channels demand data acquisition at a sampling rate ranging from 1 kilo samples per second(KSPS) to 1 mega samples per second(MSPS).Considering the technical characteristics and requirements of the diagnostics,a data acquisition system based on PXI and CAMAC has been developed for SST-1 plasma diagnostics.Both these data acquisition systems are scalable.Present data acquisition needs involving slow plasma diagnostics are catered by the PXI based data acquisition system.On the other hand,CAMAC data acquisition hardware meets all requirements of the SST-1 Phase-1 fast plasma diagnostics channels.A graphical user interface for both data acquisition systems(PXI and CAMAC) has been developed using LabVIEW application development software.The collected data on the local hard disk are directly streaming to the central server through a dedicated network for post-shot data analysis.This paper describes the development and integration of the data acquisition system for SST-1 Phase-1 plasma diagnostics.The integrated testing of the developed data acquisition system has been performed using SST-1 central control and diagnostics signal conditioning units.In the absence of plasma shots,the integrated testing of the data acquisition system for the initial diagnostics of SST-1 Phase-1 operation has been performed with simulated physical signals.The primary engineering objective of this integrated testing is to validate the performance of the developed data acquisition system under simulated conditions close to that of actual tokamak operation.The data acquisition is synchronized with a clock and trigger provided by the central timing system.  相似文献   

15.
The vertex detector front-end electronics are described. It comprises fast analog-to-digital conversion circuits and a fast programmable track trigger processor. The function of the electronics is to examine, within one large electron-positron beam crossing (22 μs), data generated in the detector for the evidence of charged particle tracks. Measurements of ionization drift times are based on a gated 93-MHz oscillator synchronized to a precision crystal clock and give points in space. The axial positions of these points along the detector are found by analyzing the difference in time of arrivals of signals at the ends of the detector (z by timing). Particle tracks are found by 36 track finders operating in parallel and are matched by semicustom coincidence chips. The track information is used in the first stage of data reduction in the Opal experiments (the first-level trigger)  相似文献   

16.
针对面向暗物质直接探测的t级原型液氩探测器的信号读出需求,本文设计了1套基于高速、高精度波形数字化技术及PXI Express高速仪器总线技术的读出电子学系统。该系统采用多个波形数字化模块和1个全局触发模块,实现单机箱40路光电倍增管信号的同步采集。系统具有很好的灵活性和可扩展性,通过将多个机箱的触发模块级联可进一步将系统规模扩展至数百通道。该系统研制完成后,配合1个10 kg级的小型液氩探测器开展了单光电子标定和放射源联调测试。通过放射源测试,获得了高质量的液氩探测器闪烁光信号波形。利用脉冲形状甄别算法,可清晰区分核反冲事例和γ事例,初步结果表明,在80~240 pe(光电子)信号幅度范围内的17万个事例中,没有电子反冲信号被误判为中子信号,验证了读出电子学技术路线和设计方案的可行性。  相似文献   

17.
1 Overview of the data acquisi-tion system for BES IIIAfter having run successfully for more than tenyears, the BEPC e+ e- collider will be upgradedfor higher luminosity, which will be increased to1033 cm-2 ·sec-1 [1]. Therefore, its detector BESII willbe upgraded to BESIII in order to take advantage ofthis increased luminosity, named BESIII.Trigger rate and event size define the performance re-quirements for the data acquisition (DAQ) system. Forpeak luminosity, we expect a L1 t…  相似文献   

18.
The prototype readout electronics system of direct dark matter detection experiments, which is mainly based on high speed and high precision waveform sampling and high speed data transfer techniques, consists of multiple waveform digitization modules (WDMs) and one global trigger module (GTM). The WDM exploits high speed analog-to-digital converter to acquire signals from the photomultiplier tubes (PMTs). The GTM collects hit information from WDMs, generates system trigger signal and fans out synchronous clock to all WDMs via backplane buses. Based on offline pulse shape discrimination method, the nuclear recoil events from a PuC neutron source can be clearly distinguished from gamma events within the energy range of 80 pe (photoelectron) to 240 pe for gamma rays, which indicates the capability of fulfilling the requirements of LAr-based direct dark matter detection experiments in future.  相似文献   

19.
20.
This article describes the prototype of the read-out subsystem which will be subject to the BESⅢ data acquisition system. According to the purpose of the BESⅢ, the event rate will be about 4000 Hz and the data rate up to 50 Mbytes/sec after Level 1 trigger. The read-out subsystem consists of some read-out crates and a read-out computer whose function is to initialize the hardware, to collect the event data from the front-end electronics after Level 1 trigger, to transfer data fragments to the computer in online form through two levels of computer pre-processing and high-speed network transmission. In this model, the crate level read-out implementation is based on the commercial single board computer MVME5100 running the VxWorks operating system.The article outlines the structure of the crate level testing platform of hardware and software. It puts emphasis on the framework of the read-out test model, data process flow and test method at crate level. Especially, it enumerates the key technologies in the process of design and analyses the test results. In addition, results which summarize the performance of the single board computer from the data transferring aspects will be presented.  相似文献   

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