Improvement in the negative bias temperature stability of ZnO based thin film transistors by Hf and Sn doping

We assessed the performance of ZnO TFTs using Si₃N₄ gate dielectrics after various treatments. A remarkable improvement in the transfer characteristics was obtained for the O₂ plasma treated ZnO TFT and SiO₂ interlayer deposited ZnO TFT. Also, we developed amorphous hafnium-zinc-tin oxide (HZTO) thin film transistors (TFTs) and investigated the influence of hafnium (Hf) doping on the electrical characteristics of the hafnium-zinc oxide (HZO) thin film transistors. Doping with Hf can decrease the carrier concentration, which may result from a decrease of the field effect mobility, and reduce oxygen vacancy related defects in the interfacial layer. Adding tin (Sn) can suppress the growth of a crystalline phase in the HZTO films. The HZTO TFTs exhibited good electrical properties with a field effect mobility of 14.33 cm²/Vs, a subthreshold swing of 0.97 V/decade, and a high I_ON/OFF ratio of over 10⁹.     

High-performance ZnO thin film transistors with sputtering SiO2/Ta2O5/SiO2 multilayer gate dielectric

A high-performance ZnO thin film transistor （ZnO-TFT） with SiO₂/Ta₂O₅/SiO₂ (STS) multilayer gate insulator is fabricated by sputtering at room temperature. Compared to ZnO-TFTs with sputtering SiO₂ gate insulator, its electrical characteristics are significantly improved, such as the field effect mobility enhanced from 11.2 to 52.4 cm²/V s, threshold voltage decreased from 4.2 to 2 V, and sub-threshold swing improved from 0.61 to 0.28 V/dec. The improvements are attributed to the high gate capacitance (from 50 to 150 nF/cm²) as well as nice surface morphology by using dielectric with high～k Ta₂O₅ sandwiched by SiO₂ layers. The capacitance-voltage characteristic of a metal-insulator-semiconductor capacitor with the structure of Indium Tin Oxide/STS/ZnO/Al was investigated and the trap charges at the interface or bulk is evaluated to be 2.24 × 10¹² cm⁻². From the slope of C⁻² versus gate voltage, the doping density N_D of ZnO is estimated to be 1.49 × 10¹⁶ cm⁻³.     

Oxide and nitride encapsulation of large-area graphene field effect devices

Room temperature magnetron sputtering is used to deposit SiO₂ and Si₃N₄ encapsulation layers on top of back gated graphene transistors, which are fabricated with CVD grown graphene transferred onto SiO₂ and Si₃N₄ substrates. Raman spectroscopy with 514 nm laser excitation was performed on bare and encapsulated devices. A small increase in D peak of the encapsulated spectrum indicates minimal increase in defect density for both SiO₂ and Si₃N₄ deposition. Graphene on Si₃N₄ exhibits an average mobility of ~ 4000 cm²/V.s at a carrier density of 10¹² cm^− 2 and up to 80% mobility is retained upon encapsulation with Si₃N₄, while on SiO₂ the average mobility is ~ 2000 cm²/V.s with mobility retention of up to 55% with SiO₂ encapsulation.     

Copper phthalocyanine thin-film field-effect transistor with SiO2/Ta2O5/SiO2 multilayer insulator

Top-contact Copper phthalocyanine (CuPc) thin-film field-effect transistor (TFT) with SiO₂/Ta₂O₅/SiO₂ (STS) multilayer as the dielectric was fabricated and investigated. With the multi-layer dielectric, drive voltage was remarkably reduced. A relatively large on-current of 1.1 × 10⁻⁷ A at a V_GS of −15 V was obtained due to the strong coupling capability provided by the STS multilayer gate insulator. The device shows a moderate performance: saturation mobility of μ_sat = 6.12 × 10⁻⁴ cm²/V s, on-current to off-current ratio of I_on/I_off = 1.1 × 10³, threshold voltage of V_TH = −3.2 V and sub-threshold swing SS = 1.6 V/dec. Atomic force microscope images show that the STS multilayer has a relative smooth surface. Experiment results indicate that STS multilayer is a promising insulator for the low drive voltage CuPc-based TFTs.     

Effect of NH3 plasma treatment on the device performance of ZnO based thin film transistors

We fabricated an enhancement-mode thin film transistor (TFT) using ZnO as an active channel layer deposited by radio frequency (rf) magnetron sputtering. The NH₃ plasma passivation was performed in order to improve the electrical properties of the ZnO TFTs. We observed that the NH₃ plasma treated ZnO TFTs revealed improved device performances, which include the field effect mobility of 34 cm²/Vs, threshold voltage of 14 V, subthreshold swing of 0.44 V/dec, off-current of 10⁻¹¹ A and on to off ratio higher than 10⁵. These results demonstrate that NH₃ plasma treatment could effectively enhance the performance of the ZnO based TFT device.     

High performance self-aligned top-gate ZnO thin film transistors using sputtered Al2O3 gate dielectric

High performance self-aligned top-gate zinc oxide (ZnO) thin film transistors (TFTs) utilizing high-k Al₂O₃ thin film as gate dielectric are developed in this paper. Good quality Al₂O₃ thin film was deposited by reactive DC magnetron sputtering technique using aluminum target in a mixed argon and oxygen ambient at room temperature. The resulting transistor exhibits a field effect mobility of 27 cm²/V s, a threshold voltage of − 0.5 V, a subthreshold swing of 0.12 V/decade and an on/off current ratio of 9 × 10⁶. The proposed top-gate ZnO TFTs in this paper can act as driving devices in the next generation flat panel displays.     

Improvement in light output intensity of InGaN/GaN multiple-quantum-well blue light-emitting diode by SiO2/Si3N4 distributed Bragg reflectors and silver back mirror

In this article, the light output intensity of InGaN/GaN multiple-quantum-well (MQW) light emitting diodes (LEDs) is improved by using SiO₂/Si₃N₄ distributed Bragg reflectors (DBRs) as window layer and Ag back mirror. The SiO₂/Si₃N₄ DBRs can take several advantages, such as high reflectance with less number of DBR, passive characteristics, and high reliability due to growth in one pump down growth system. The experimental results indicated that InGaN/GaN LEDs with the 3-pair of SiO₂/Si₃N₄ DBRs show a maximum light output intensity of 64 mcd under 20 mA driving current and an improvement of 42% as compared to that of InGaN/GaN LEDs without SiO₂/Si₃N₄ DBRs. In addition, the turn-on voltage, forward resistance, and full width at half maximum (FWHM) of the emission spectra for InGaN/GaN LEDs with the 3-pair of SiO₂/Si₃N₄ DBRs and Ag back mirror are 3.23 V, 16 Ω, and 22.4 nm under 20 mA forward current.     

Pentacene thin-film transistors and inverters with plasma-enhanced atomic-layer-deposited Al2O3 gate dielectric

The performances of pentacene thin-film transistor with plasma-enhanced atomic-layer-deposited (PEALD) 150 nm thick Al₂O₃ dielectric are reported. Saturation mobility of 0.38 cm²/V s, threshold voltage of 1 V, subthreshold swing of 0.6 V/decade, and on/off current ratio of about 10⁸ have been obtained. Both depletion and enhancement mode inverter have been realized with the change of treatment method of hexamethyldisilazane on PEALD Al₂O₃ gate dielectric. Full swing depletion mode inverter has been demonstrated at input voltages ranging from 5 V to − 5 V at supply voltage of − 5 V.     

Zinc oxide thin film transistors using MgO-Bi1.5Zn1.0Nb1.5O7 composite gate insulator on glass substrate

We report on high mobility ZnO thin film transistors (TFTs) (< 5 V), utilizing a room temperature grown MgO-Bi_1.5Zn_1.0Nb_1.5O₇ (BZN) composite gate insulator on a glass substrate. 30 mol% MgO added BZN composite gate insulators exhibited greatly enhanced leakage current characteristics (~< 2 × 10^− 8 A/cm² at 0.3 MV/cm) due to the high breakdown strength of MgO, while retaining an appropriate high-k dielectric constant of 32. The ZnO-TFTs with MgO-BZN composite gate insulators showed a high field-effect mobility of 37.2 cm²/Vs, a reasonable on-off ratio of 1.54 × 10⁵, a subthreshold swing of 460 mV/dec, and a low threshold voltage of 1.7 V.     

Structure of double interfaces system of Si3N4/SiO2/Si irradiated by γ-rays

The interfacial structures of double interfaces system of Si₃N₄/SiO₂/Si were examined using X-ray photoelectron spectroscopy (XPS) before and after ⁶⁰Co radiation. The experimental results demonstrate that there existed two interfaces, one consisted of Si₃N₄ and SiO₂, while another was made of Si and SiO₂, the interface between SiO₂ and Si was extended towards the interface of the Si₃N₄/SiO₂ meanwhile the center of the former interface was removed in the direction of the latter interface by ⁶⁰Co. The concentration of silicon in the Si₃N₄ state (BE 101.8 eV) was decreased with the variation of radiation dosage as well as bias field within the SiO₂-Si interface, remarkably. The mechanism for the experimental results is analyzed.     

Plasmons in double interfaces system of Si3N4/SiO2/Si irradiated by Co

The first level plasmons of Si in the pure Si state, in the SiO₂ state and in the Si₃N₄ state (corresponding to bonding energy 116.95, 122.0 and 127.0 eV) were investigated directly with X-ray photoelectron spectroscopy before and after ⁶⁰Co radiation. The experimental results demonstrate that there existed two interfaces, one consisted of plasmons of Si in the Si₃N₄ and SiO₂ states, while another was made of plasmons of Si in the pure Si state and in the SiO₂ state. When the Si₃N₄-SiO₂-Si samples were irradiated by ⁶⁰Co, the interface at Si₃N₄/SiO₂ was extended and at the same time the center of this interface moved towards the surface of Si₃N₄. The concentration of plasmon for silicon in the SiO₂ state is decreased at the SiO₂-Si interface, and the effects of radiation bias field on plasmons in the SiO₂-Si interface are observable. Finally, the mechanism of experimental results is analyzed by the quantum effect of plasmon excited by the photoelectron.     

Large-scale synthesis of ear-like Si3N4 dendrites from SiO2/Fe composites and Si powders

Large-scale ear-like Si₃N₄ dendrites were prepared by the reaction of SiO₂/Fe composites and Si powders in N₂ atmosphere. The product was characterized by field emission scanning electron microscopy, X-ray diffraction, and transmission electron microscopy. The results reveal that the product mainly consists of ear-like Si₃N₄ dendrites with crystal structures, which have a length of several microns and a diameter of 100-200 nm. Nanosized ladder-like Si₃N₄ was also obtained when changing the Fe content in the SiO₂/Fe composites. The Si₃N₄ nanoladders have a length of hundreds nanometers to several microns and a width of 100-300 nm. The ear-like Si₃N₄ dendrites are formed from a two-step growth process, the formation of inner stem structures followed by the epitaxial growth of secondary branches.     

Evaluation of Y2O3 gate insulators for a-IGZO thin film transistors

In this work, Y₂O₃ was evaluated as a gate insulator for thin film transistors fabricated using an amorphous InGaZnO₄ (a-IGZO) active layer. The properties of Y₂O₃ were examined as a function of various processing parameters including plasma power, chamber gas conditions, and working pressure. The leakage current density for the Y₂O₃ film prepared under the optimum conditions was observed to be ~ 3.5 × 10^− 9 A/cm² at an electric field of 1 MV/cm. The RMS roughness of the Y₂O₃ film was improved from 1.6 nm to 0.8 nm by employing an ALD (Atomic Layer Deposition) HfO₂ underlayer. Using the optimized Y₂O₃ deposition conditions, thin film transistors (TFTs) were fabricated on a glass substrate. The important TFT device parameters of the on/off current ratio, sub-threshold swing, threshold voltage, and electric field mobility were measured to be 7.0 × 10⁷, 0.18 V/dec, 1.1 V, and 3.3 cm²/Vs, respectively. The stacked insulator consisting of Y₂O₃/HfO₂ was highly effective in enhancing the device properties.     

Optimization of silicon nanocrystals growth process by low pressure chemical vapor deposition for non-volatile memory application

The processes of silicon nanocrystals (Si-NCs) growth on both SiO₂ and Si₃N₄ substrates by low pressure chemical vapor deposition have been systematically investigated. A two-step process was adopted for Si-NCs growth: nucleation at a high temperature (580-600 °C) and growth at a low temperature (550 °C). By adjusting the pre-deposition waiting time and deposition time, the density, size and uniformity can be effectively controlled. Compared to the growth of Si-NCs on SiO₂, the coalescence speed of Si-NCs on Si₃N₄ is faster. Uniform Si-NCs with a high density of 1.02 × 10¹² cm^− 2 and 1.14 × 10¹² cm^− 2 have been obtained on SiO₂ and Si₃N₄, respectively. Finally, a Si-NCs-based memory structure with a 2.1 V memory window was demonstrated.     

Annealing effect on dielectric and leakage current characteristics of Mn-doped Ba0.6Sr0.4TiO3 thin films as gate insulators for low voltage ZnO thin film transistor

We report on the dielectric properties and leakage current characteristics of 3 mol% Mn-doped Ba_0.6Sr_0.4TiO₃ (BST) thin films post-annealed up to 600 °C following room temperature deposition. The suitability of 3 mol% Mn-doped BST films as gate insulators for low voltage ZnO thin film transistors (TFTs) is investigated. The dielectric constant of 3 mol% Mn-doped BST films increased from 24 at in-situ deposition up to 260 at an annealing temperature of 600 °C due to increased crystallinity and the formation of perovskite phase. The measured leakage current density of 3 mol% Mn-doped BST films remained on the order of 5 × 10^− 9 to 10^− 8 A/cm² without further reduction as the annealing temperature increased, thereby demonstrating significant improvement in the leakage current characteristics of in-situ grown Mn-doped BST films as compared to that (5 × 10^− 4 A/cm² at 5 V) of pure BST films. All room temperature processed ZnO-TFTs using a 3 mol% Mn-doped BST gate insulator exhibited a field effect mobility of 1.0 cm²/Vs and low voltage device performance of less than 7 V.     

Optical and electrical properties of 2 wt.% Al2O3-doped ZnO films and characteristics of Al-doped ZnO thin-film transistors with ultra-thin gate insulators

Al-doped ZnO (AZO) thin films have been prepared on the c-Si oriented direction of (100) and glass substrates, by radio frequency magnetron sputtering from ZnO-2 wt.% Al₂O₃ ceramic targets. The effects of the working pressure on the optical and electrical properties of the films have been studied. The optical properties, measured by the ultraviolet-visible system, show that the transmittance and optical bandgap energy are influenced by the working pressure. The Hall resistivity, mobility, and carrier concentration were obtained by a Hall measurement system and these parameters were also influenced by the working pressure. The AZO thin-film transistors (TFTs) were fabricated on highly doped c-Si substrates. The TFT structures were made up AZO as the active layer and SiO_xN_y/SiN_x/SiO_x as the gate layer with 20 nm and 35 nm thickness, respectively. The ultra-thin TFTs had an on/off current ratio of 10⁴ and a field-effect mobility of 0.17 cm²/V·s. These results show that it is possible to fabricate an AZO TFT that can be operated with an ultra-thin gate dielectric.     

Electrical properties of Ge metal-oxide-semiconductor capacitors with La2O3 gate dielectric annealed in different ambient

Ge metal-oxide-semiconductor capacitors with La₂O₃ as gate dielectric are fabricated by e-beam evaporation of La₂O₃ followed by post-deposition annealing in different gases (NH₃, N₂, NO, N₂O and O₂). Experimental results indicate that the NH₃, NO, N₂O and O₂ anneals give higher interface-state and oxide-charge densities, and thus larger gate leakage current, with the highest for the O₂ anneal due to the growth of an unstable GeO_x interlayer. On the other hand, the NH₃ annealing improves the k value of the dielectric, while the annealings in O₂-containing ambients (NO, N₂O and O₂) lead to the formation of a low-k GeO_x interlayer, thus decreasing the equivalent k value. Compared with the above four samples, the sample annealed in N₂ exhibits not only larger k value (18.3) and smaller capacitance equivalent thickness (2.14 nm), but also lower leakage current density (~ 10⁻³ Acm^− 2 at V_g = 1 V) and smaller interface-state density (4.5 × 10¹¹ eV^− 1 cm^− 2).     

Preparation of the rod-like β-Si3N4 particles favoring the self-reinforcing Si3N4 ceramics

The β-Si₃N₄ particles were prepared by heating original α-Si₃N₄ powder with rare earth oxide Nd₂O₃ or Yb₂O₃ additives at 1600-1700 °C for 1.5 h. The transformation ratio of α-Si₃N₄ was also investigated by XRD. The results showed that Yb₂O₃ could accelerate the transformation of Si₃N₄ more effectively than Nd₂O₃ and the powder heated at 1700 °C with over 4 wt.% Yb₂O₃ has a high transformation ratio of over 98%. The morphologies of the heated powders were observed by scanning electron microscopy. The results showed that the powder heated at 1700 °C with 4 wt.% Yb₂O₃ had ideal β-Si₃N₄ rod-like morphology particles. This heated powder was used as a seed by adding it to the original α-Si₃N₄ powder to prepare self-reinforced Si₃N₄ ceramic by hot-pressed sintering. The fracture toughness of the seeded Si₃N₄ ceramics increased to 9.1 MPa m^1/2 from 7.6 MPa m^1/2 of the unseeded Si₃N₄ ceramics, while the high value of strength was still kept at 1200 °C.     

Silicon oxide synthesized using an atmospheric pressure microplasma jet from a tetraethoxysilane and oxygen mixture

Local deposition of SiO_x was studied using an atmospheric pressure very-high-frequency (VHF) inductive coupling microplasma jet (AP-MPJ) from a tetraethoxysilane ((Si(OC₂H₅)₄), TEOS) and oxygen mixture. The SiO_x obtained showed the dielectric constant of 3.8 with a low leakage current of the order of ∼ 10^− 6 A ·cm^− 2 up to 8 MV ·cm^− 1. Bottom-gated sputtered-ZnO thin-film transistors with a AP-MPJ SiO_x as a gated dielectric layer exhibited a relatively high field-effect mobility of 24 cm² V^− 1 s^− 1, a threshold voltage of 14 V and an on/off current ratio of ∼ 10⁴, a performance comparable to that of thermal silicon dioxide. The TFT performance was also obtained for the top-gated ZnO-TFTs with a field-effect mobility of 1.4 cm² ·V^− 1 s^− 1, a threshold voltage of − 1.9 V, and an on/off current ratio of ∼ 10³.     

Amorphous In-Ga-Zn-O thin-film transistor with coplanar homojunction structure

Amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) with a coplanar homojunction structure are demonstrated. The coplanar source and drain regions made of a-IGZO were formed by depositing a hydrogenated silicon nitride (SiN_X:H) layer onto the a-IGZO layer. The a-IGZO regions on which the SiN_X:H layer was directly deposited showed the low resistivity of 4.7 × 10⁻³  Ω cm and degenerated conduction. The fabricated TFT showed excellent transfer and output characteristics with a field-effect mobility of 11 cm² V^− 1 s^− 1, a subthreshold swing of 0.17 V decade^− 1, and an on-to-off current ratio larger than 1 × 10⁹. The width-normalized source-to-drain resistance (R_sdW) calculated using a channel resistance method was 51 Ω cm. This TFT also showed good stability over environment change and under electrical stress.