基于特定模数集的并行DNA算术运算

在DNA算术运算的模型中普遍应用二进制,受制于进位的影响,难以实现并行运算。但在剩余数制中,算术运算(加、减、乘)在剩余位之间不存在进位,故可降低运算过程的复杂度,可以充分利用DNA计算巨大并行性的优势,简化实际编码的难度。基于Adleman-Lipton模型,分析了剩余数制的基本原理,基于特定的模数集,改进了整数的DNA链表示,并将其应用于DNA算术运算,给出了特定剩余数制下进行并行DNA算术运算的具体算法。     

基于DNA自动机的串行二进制进位加法的实现

提出了一种基于DNA自动机的串行二进制进位加法的实现方法。对于一位二进制的进位加法，通过预先设计的DNA自动机模型在一个试管中以自动机的方式完成。对于”位二进制的进位加法，通过将n个类似的试管按照从低位到高位的顺序组成串行网络；将低位加法操作产生的进位转移到高位试管，组成高位自动机的输入符号串，完成高位的加法操作。这种运算方式类似于电子计算机中加法运算系统，为DNA计算机实现算术运算提供了一种新颖的方法。     

实现快速运算的剩余系统

一、概述 二进制与十进制具有许多优点,它们已广泛地用于数字计算机的算术运算。但是,由于它们是一种固定基的加权数制,所以对于任何算术运算,其结果的每一位数字不仅依赖于操作数的对应位,而且依赖于比该位低的数位上的所有数字。由于运算时需要考虑进位传送,不可能实现所有数位的并行运算,从而使得算术运算的速度受到限制。随着电子计算机运算速度的迅速提高,在执行算术运算时为了处理     

TTL中规模集成电路及其应用

<正> 三、算术逻辑运算单元算术逻辑运算单元是功能较强的中规模集成电路。除了能进行快速加法运算外还能进行其它算术运算(如减法……)及逻辑运算(如逻辑乘、求反……)。集成化运算单元的结构设计主要考虑两个问题: (一)提高运算速度,普遍在片内采用超前进位技术;运算单元要能扩展,能和专门的快速进位扩展器配合,组成多片快速运算单元。     

面向工业控制的一位微型计算机——第七讲 典型实用程序集锦(二)

<正> 5.算术运算程序A.加法加法在一位机中是按位串行实现的:二对应位相加求得"和"S和"进位"C.显然二相应位相加时必须一并考虑低位的进位,这就是"全加".全加真值表如表1所示.     

使用DAA指令应注意的问题

<正> Z80中的DAA指令,是十进制调整指令,用于把BCD数算术运算的结果(存于累加器A中)调整为BCD数。调整是根据运算结果及标志寄存器的状态来进行的。具体地说,当低四位结果≥10D,或半进位位H=1时要进行调整;当(高四位结果+H)≥10D或进位位C_Y=1时要进行调整。当减标志位N=0时,进行加调整(+6);N=1时,进行减调整(-6)。使用DAA指令时应注意以下问题: 1.DAA必须紧跟在八位数算术运算指令之后,即要放在ADD ADC(加法),SUB SBC(减法)NEG(求补)和INC A(增量)、DEC(减量)这些指令的后面,不能用于十六位数运算指令之后,也不能单独使用。     

兼容MIPS指令集的超标量微处理器ALU设计

文章介绍了一种兼容MIPS指令系统的32位超标量微处理器IP核(简称BSR03)的设计。重点讨论了其中的32位先行进位ALU的设计,以及对补码数与无符号数算术运算的溢出、进位、借位、比较等问题的处理方法。BSR03采用自顶向下的层次设计方法,用VH DL语言进行描述,用Active-H DL6.1进行仿真、验证,用synplify pro7.1进行综合,该设计符合预定的结果。     

基于DNA下推自动机二进制减法和乘法的实现

提出了基于DNA下推自动机二进制减法和乘法的实现方法.一位二进制借位减法,是通过预先构造好的DNA下推自动机模型在一个试管中以该模型的运行方式自动完成运算.m位二进制借位减法,是在一位二进制减法的基础上,按照从低位到高位的顺序,将低位产生的借位作为高位试管操作巾的输入符号串,从而完成高位的减法运算.两位二进制乘法中包含移位和加法操作,在两个试管中分别设计好DNA下推自动机模型,分别完成被乘数与乘数各位的移位操作,同时结合相应的生物操作,将其作为另一个试管加法操作中的输入符号串,则加法操作中产牛的结果即为所求.在此基础上,m位二进制乘法可通过移位操作的并行性和加法操作的串行性来完成运算.这些实现方法为DNA下推自动机实现基本的算术运算提供了比较完整的运算机制.     

数字文化中的几个基本概念的探讨

对数字文化中进位数制、进位数制转换、度量单位等几个基本概念作了探讨,针对学生在学习过程中容易出现的疑问和错误作了解答,同时阐述了以实例为主、概念为辅、强调理解与应用的教学方法。     

高速双域求逆单元的设计与实现

提出了一种能够在素数域和二进制域下,高速处理384位以下数据的模逆运算单元。其使用改进的 Montgomery 模逆算法将两个域下的求逆运算统一起来。设计中使用了 S—C操作数分离表示法减少进位传播,并提出 S—C减法运算修正算法保证其正确性。设计了双域 S—C分离加减运算单元,使其能高速完成两个有限域下的算术运算。     

Residue-to-binary conversion for general moduli sets based on approximate Chinese remainder theorem

The residue number system (RNS) is an unconventional number system which can lead to parallel and fault-tolerant arithmetic operations. However, the complexity of residue-to-binary conversion for large number of moduli reduces the overall RNS performance, and makes it inefficient for nowadays high-performance computation systems. In this paper, we present an improved approximate Chinese remainder theorem (CRT) with the aim of performing efficient residue-to-binary conversion for general RNS moduli sets. To achieve this aim, the required number of fraction bits for accurate residue-to-binary conversion is derived. Besides, a method is proposed to substitute fractional calculations by similar computations based on integer numbers to have a hardware amenable algorithm. The proposed approach results in high-speed and low-area residue-to-binary converters for general RNS moduli sets. Therefore, with this conversion method, high dynamic range residue number systems suitable for cryptography and digital signal processing can be designed.     

PRNS—有权剩余数系统

本文提出的ＰＲＮＳ是一种有权和无权两种记数制相嵌套而构成的层次结构记数制，根据ＰＲＮＳ蚵以构造比传统二进制系统快许多倍的算术处理机，本文阐述了ＰＲＮＳ的基本概念，原理和加法算法，并提出了一种Ｓ进制ＰＲＮＳ数母全加器。     

数制转换的DNA计算模型

主要研究十进制与二进制互换的DNA算法。利用DNA分子的数制转换库,根据进制转换的一种并行计算方法,通过编码不同结构的数制转换DNA分子来构造DNA计算的自装配模型,该模型可以解决不同进制数的自动转换问题。阐明了数制转换库的结构,并给出了转换库的空间复杂度。     

Accuracy evaluation of fixed-point based LMS algorithm

The implementation of adaptive filters with fixed-point arithmetic requires computation quality evaluation. The accuracy may be determined by computing the global quantization noise power at the system output. In this paper, a new model for evaluating analytically the global noise power in LMS-based algorithms is presented. Thus, the model is developed for LMS and NLMS algorithms. The accuracy of our model is analyzed by simulations.     

Least significant bit evaluation of arithmetic expressions in single-precision

Single-precision floatingpoint computations may yield an arbitrary false result due to cancellation and rounding errors. This is true even for very simple, structured arithmetic expressions such as Horner's scheme for polynomial evaluation. A simple procedure will be presented for fast calculation of the value of an arithmetic expression to least significant bit accuracy in single precision computation. For this purpose in addition to the floating-point arithmetic only a precise scalar product (cf. [2]) is required. If the initial floatingpoint approximation is not too bad, the computing time of the new algorithm is approximately the same as for usual floating-point computation. If not, the essential progress of the presented algorithm is that the inaccurate approximation is recognized and corrected. The algorithm achieves high accuracy, i.e. between the left and the right bound of the result there is at most one more floating-point number. A rigorous estimation of all rounding errors introduced by floating-point arithmetic is given for general triangular linear systems. The theorem is applied to the evaluation of arithmetic expressions.     

Compact yet efficient hardware implementation of artificial neural networks with customized topology

There are several neural network implementations using either software, hardware-based or a hardware/software co-design. This work proposes a hardware architecture to implement an artificial neural network (ANN), whose topology is the multilayer perceptron (MLP). In this paper, we explore the parallelism of neural networks and allow on-the-fly changes of the number of inputs, number of layers and number of neurons per layer of the net. This reconfigurability characteristic permits that any application of ANNs may be implemented using the proposed hardware. In order to reduce the processing time that is spent in arithmetic computation, a real number is represented using a fraction of integers. In this way, the arithmetic is limited to integer operations, performed by fast combinational circuits. A simple state machine is required to control sums and products of fractions. Sigmoid is used as the activation function in the proposed implementation. It is approximated by polynomials, whose underlying computation requires only sums and products. A theorem is introduced and proven so as to cover the arithmetic strategy of the computation of the activation function. Thus, the arithmetic circuitry used to implement the neuron weighted sum is reused for computing the sigmoid. This resource sharing decreased drastically the total area of the system. After modeling and simulation for functionality validation, the proposed architecture synthesized using reconfigurable hardware. The results are promising.     

一种新的余数系统下快速计算素域椭圆曲线点乘的方法

椭圆曲线密码运算主要是椭圆曲线点乘,后者由一系列的模乘构成。利用余数系统下的蒙哥马利模乘算法,素域中对阶取模余的模乘可以转化为对余数系统基底取模余。提出一种新的余数系统下的方法以加速计算椭圆曲线点乘。（1）与传统上取两个几乎对称的余数系统不同,该方法取了两个非对称的余数系统。其中,余数系统Γ包括两个模数{2L, 2 L-1}; 余数系统Ω包括八个模数,它们都具有如2L－2Ki+1的形式。这种选择使其模算术变得简单。（2）在上述非对称的余数系统中,大部分原来需要对椭圆曲线域特征值取模的模乘运算可以在余数系统中直接用乘法代替。此外,计算椭圆曲线点乘时用到了仅计算x坐标的蒙哥马利梯子。在每次并行的倍点和点加结束时,需要四次余数系统下的蒙哥马利模乘,以压缩中间结果的值域。因此,计算一个N位的椭圆曲线点乘,需要的时间约为55.5N·I, 其中,I是一个L/2位的乘法、一次保留进位加法、一个L/2位的加法的总延时。     

Floating point arithmetic teaching for computational science

Computational science is based upon numerical computing and, consequently, requires excellent knowledge of floating point computer arithmetic. In general, the average computational science student has a relatively limited understanding of the implications of floating point computation. This paper presents an initiative to teach floating point number representation and arithmetic in undergraduate courses in computational science. The approach is based on carefully designed practical exercises which highlight the main properties and computational issues of finite length number representation and arithmetic. In conjunction to the exercises, an auxiliary educational tool constitutes a valuable support for students to learn and understand the concepts involved. Simpler formats are used as an introduction to the IEEE 754 standard, with the aim of presenting the fundamentals of the floating point computation and emphasizing its limitations. This approach could be included in courses related to computer organization, programming, discrete mathematics, numerical methods or scientific computing in computational science curricula.     

一阶有限群控制下实数域多方向计算的实现

根据一阶有限群的多方向计算,实现实数域运算描述的数学模型的多方向计算。多方向计算是以群论和图论为理论基础。一阶的有限群是对研究的初等代数运算描述的数学模型的最高形式的抽象。把一阶的有限群的多方向计算的性质应用到实数域的数学模型,应用到科学和工程领域的大量计算中去。根据这些研究建立一个计算系统的软件,名叫“九章”。“九章”能够加载以初等代数公式描述的数学模型,并演算求解模型各个计算方向的应用。它的特点是能够对数学模型进行多方向计算。把可以多方向计算的数学模型从应用程序分离出来,由“九章”来运行,提供数学模型多方向执行和并行执行的特征。