一种低压低功耗Rail-to-Rail运算放大器的设计

基于TSMC 0.18μm互补型金属氧化物半导体(CMOS)工艺,设计了一种2 V低功耗恒定跨导Rail-to-Rail运算放大器。该运算放大器的输入级采用并行N沟道和P沟道差分输入级,实现了Rail-to-Rail的共模输入范围;为使输入跨导在整个共模输入范围内基本恒定,采用三倍电流镜技术;输出级采用带有Cascode米勒补偿的AB类输出控制电路。在Cadence Spectre环境下仿真后的结果显示:直流增益为91 dB,相位裕度为84.5°,单位增益带宽为9.4MHz,功耗为0.2 mW,适合应用在各种低压低功耗场合。     

海洋环境噪声接收机的设计与实现

针对海洋环境噪声的测量,设计了一种低噪声、宽带、高动态范围的水声接收机。采用新一代真有效值转直流芯片AD8436实现噪声信号有效值的实时高精度计算,并通过微控制器调整程控增益放大器的增益码完成自动增益控制,同时自动记录系统增益值。该接收机具有良好的人机交互接口,既可在线传递系统的增益,又可按用户需求设定固定的增益。实验测试表明,该接收机的等效输入自噪声小等于3 μVrms,频率带宽为20 Hz~5.5 kHz,信号输入的动态范围大等于68 dB;且具有精度高、适应性强和电路性能稳定等特点,可较好地满足海洋环境噪声的测量与分析。     

P波段低温低噪声放大器的设计与测量

本文介绍了用于P波段高温超导滤波系统的低温低噪声级联放大器的研制以及低温系统调谐方法和测试方法。低噪声放大器采用Agilent ATF-54143高电子迁移率场效应晶体管,集总参数元件进行设计,引入源级负反馈与有耗电阻提高稳定性,选用П型输入匹配网络,扩展带宽,满足直流偏置的要求。制备的低温低噪声放大器在70K温度下,工作频段为450-550MHz,两级放大电路噪声低于0.5dB,输入驻波比优于1.3,增益29.2±0.3dB。采用了两极供电系统以方便在70K的条件下对滤波系统进行调节,使得前级滤波器和低噪声放大器获得较好匹配,最终系统输入驻波比优于1.3,增益27±0.1dB,带宽15MHz,系统噪声小于0.6dB。     

数字电位器在测量放大器中的应用

在简要介绍了I∧2C总线数字电位器X9221的工作原理的基础上，结合可程控增益放大器AD625，设计了一个同单片机软件编程控制适合于多量程范围的测量放大器。     

一种具有高转换速率的轨对轨运算放大器

为了驱动液晶显示器背板形成不同的灰阶,设计了一种利用齐纳二极管的稳压原理,实现恒定跨导用于TFT-LCD液晶显示的片内运算放大器。采用互补差分输入级,实现了Rail-to-Rail的共模电压输入范围;一种新颖的转换速率增强结构,加快了运算放大器的响应速度;输出级采用Class AB类控制电路,并将其嵌入到求和电路中,以保证较低的噪声和失调。直流增益为101dB,单位增益带宽为13MHz,相位裕度为64°。仿真结果证明该运算放大器工作良好,其面积为500μm×380μm。     

中低频宽动态范围AGC放大器设计

自动增益控制(AGC)放大电路被广泛应用于各种音视频传输及数字中频接收系统中.介绍了一种基于AD603的快速AGC实现方法,详细分析了两级级联AD603的增益平衡分配方式,包括电路的压控检波,以及AGC起控点、输出幅度、总增益的调整方式,尤其是在低频段的改进方法.文中对其级间耦合的方式进行分析测试,实际测试其在40mV～7.5 V输入时能稳定在800mV输出,低频至2kHz,且其输出幅度、增益范围以及各部分参数调整极为方便.     

基于OPA820宽带放大器的设计

设计了一种宽带放大器,采用高速运算放大器OPA820和低失真电流反馈运算放大器THS3091构成两级放大电路,在6 Hz～20 MHz的通频带中实现放大增益为43 dB,具有带内波动小,输出噪声低的特点.同时将单一的5 V电源通过TPS61087和MC34063A产生系统所需要的正负电源为放大器供电.放大器输出经过精密...     

基于AD603的时变增益放大器的实现

探地雷达回波信号具有动态范围大、频带宽等特点,如果不对回波信号进行处理直接进行A/D转换,则会出现动态范围不匹配的问题,严重影响雷达的探测深度和分辨率。为此,本文采用AD603设计了一时变增益放大器对回波信号进行处理,通过对不同时间的回波信号给以不同的增益来补偿A/D转换器的动态范围的不足,达到与回波信号动态范围相匹配的目的。本文给出了详细的设计思想和原理电路图,实测结果表明,文中所设计的时变增益放大器能满足雷达系统的需求,具有很强的实用价值。     

基于FPGA的超声探伤仪设计

提出了一种基于FPGA的数字超声探伤仪解决方案.该方案利用超声回波信号可重复性的特点,采用50Msps模数转换系统,通过调整超声脉冲的触发时间完成等效采样变换,实现了200 Msps的高速数据采集;在超声脉冲的触发时间控制中,采用200 MHz的基准时钟,以整周期方式调整触发时间,保证了触发时间的高精度.为补偿超声波信号在大声程中的传输衰减,采用AD603实现了时变增益放大器,该放大器根据数据采集的进程实时调整放大器的增益,可较好地兼顾仪器的浅层目标识别和深层缺陷探测.     

60GHz无线收发机中宽带可变增益放大器的设计

本文采用TSMC65nmRFCMOS工艺设计实现了一种应用于60GHz高速无线通信接收机中的低功耗、高线性度、dB线性控制型的宽带可变增益放大器。该电路采用四级改进的Cherry—Hooper放大器级联结构．通过改变每级放大器单元中反馈电阻的大小获得22dB的可调增益。同时通过采用双负反馈直流失调消除电路,有效的减小了直流失调。仿真结果表明,可变增益放大器在1．2V低电压下,电路功耗仅为3．5row,增益变化范围为10dB～32dB;在最大增益32dB时3dB带宽为2．28GHz,增益压缩1dB时输出差分信号摆幅达到566mVpp。     

A low-power 75 dB digitally programmable variable-gain amplifier in 0.18μm CMOS

Variable-gain amplifiers (VGAs) are essential building blocks of many communication systems. In this paper, a monolithic low-power digitally programmable VGA with 75 dB of gain range is presented. The core of the design is based on a low-distortion source-degenerated differential amplifier structure. The gain is varied by changing the source-degeneration resistor and tuning the resistors in the common-mode feedback circuitry. The complete VGA consists of three gain stages. As a proof of concept, a 24 dB single-gain stage with 2 dB gain steps is fabricated in a 0.18 ?m CMOS technology. The prototype chip is tested, and measurement results are obtained. Based on these results, the gain stage is redesigned to optimize its performance, and a three-stage 75 dB VGA is designed and simulated. Each stage has a digitally tunable gain range of 25 dB. The overall gain can be varied from ?15 dB to 60 dB in 2.5 dB gain steps. The bandwidth of the multi-stage VGA is higher than 140 MHz, and the gain error is less than 0.3 dB. The overall VGA draws 6.5mA from a 1.8V power supply. The noise figure of the system at maximum gain is 12.5 dB, and the third-order intermodulation intercept point (IIP3) at minimum gain is 14.4 dBm.     

A low‐power four‐stage amplifier for driving large capacitive loads

A four‐stage amplifier with a new and efficient frequency compensation topology is presented in this paper. The new compensation scheme applies a Miller capacitor as the main negative feedback, a resistor and a capacitor in series as a load for one of the intermediate stages, and two feedforward paths. In order to design the amplifier and acquire circuit parameters, small signal analyses have been carried out to derive the signal transfer function and the pole‐zero locations. The proposed amplifier was designed and implemented in a standard 90 nm CMOS process with two heavy capacitive loads of 500 pF and 1 nF. The simulation results show that when driving a 500 pF load, the amplifier has a gain‐bandwidth product of 18 MHz consuming only 40.9 μW. With a 1 nF capacitive load, the proposed amplifier achieves 15.1 MHz gain‐bandwidth product and dissipates 55.2 μW from a single 0.9 V power supply. Copyright © 2013 John Wiley & Sons, Ltd.     

Fiber amplifiers for coherent space communication

We report on the application of double-clad doped fiber amplifiers for coherent space communication systems using a master oscillator power amplifier (MOPA) design at 1.06 μm. The master oscillator is either a single-frequency Nd:YAG solid-state laser or a distributed-feedback fiber laser. The power amplifier is a diode-laser-pumped double-clad Nd doped fiber with polarization control, 20 dB gain, and about 1.3 W output power. A dual stage configuration using a solid-state Nd:YAG amplifier as second stage is presented as well, increasing the output power to 3.5 W with 28 dB gain. We also report on the possibility to integrate a single-frequency fiber laser, an all-fiber phase modulator, and a fiber amplifier to build an all-fiber phase-modulated MOPA. Up to 1 W continuous-wave output phase-modulated with a bandwidth of 196 MHz has been achieved     

Adaptive frequency compensation for maximum and constant bandwidth feedback amplifiers

We present an adaptive frequency compensation technique providing maximum bandwidth closed‐loop amplifiers. The approach exploits an auxiliary variable gain amplifier to implement an electrically tunable compensation capacitor proportional to the feedback factor. In this manner, the closed‐loop bandwidth is kept ideally constant irrespective of the closed‐loop gain. The proposed method can be applied to any amplifier adopting dominant‐pole compensation. As an example, we designed a CMOS amplifier providing 66‐dB direct current gain and 310‐MHz gain‐bandwidth product. For closed‐loop gains ranging from 1 to 10, the closed‐loop bandwidth was found never lower than 401 MHz (noinverting configuration) and 229 MHz (inverting configuration). A similar amplifier with equal gain‐bandwidth product, but adopting the traditional fixed compensation approach, would exhibit a closed‐loop bandwidth reduced to 33 MHz (noninverting) and 30 MHz (inverting) when the gain magnitude is set to 10. The enhanced frequency performance is obtained with a 48% increase in current consumption, whereas the other main operational amplifier performance parameters remain almost unchanged compared with the standard solution. Copyright © 2011 John Wiley & Sons, Ltd.     

高速流水线ADC中跨导放大器设计及误差分析

应用于8 bit,1.5 bit/级,100 M采样率,高速流水线型ADC的OTA放大器设计及实现,重点分析OTA放大器的非线性,如增益非线性、不完全建立误差对高速、低功耗ADC性能的影响,并使用MATLAB建模验证分析结果。OTA放大器采用功耗较低的套筒型共源共栅放大器基本结构,通过增益提高技术提高放大器增益,采用共模反馈消除各类不匹配带来的误差。从仿真结果上看,OTA放大器增益大于80 dB,单位增益带宽为960.5 MHz,建立时间为4.87 ns。实现的高速流水线型ADC,经仿真测试DNL为0.7 LSB,INL为1.02 LSB,符合设计要求。     

大功率高精度程控直流电流源的设计与实现

大功率高精度程控直流电流源的设计与实现对各种要求高精度直流电流源的场合具有重要作用和意义。为了达到输出功率大,稳定度高,精度高,纹波小,调节细度小的高精度直流电流源设计要求,文中设计实现了一种基于STM32F103微控制器为主控制器的高精度程控直流电流源。该系统由双闭环控制系统组成,外环由模糊控制器与AD/DA器件构成数字控制电路,可快速调节电流稳态输出,内环由PI调节器构成电流串联负反馈电路,可抑制干扰并提高输出电流精度。设计了直流稳压扩流电路和达林顿放大电路及功放电路实现了大功率输出。实验结果表明该电流源输出精度可达到十万分之二,稳定度达到十万分之三,带负载能力强,特别适合于要求高精度的场合。     

ICP传感器的单电源信号调理电路设计

研讨ICP传感器的单电源信号调理电路．改变常规负向信号调理电路使用的正负运算双极性供电的结构。采用高单位增益带宽的OPA350和高精度的金属膜电阻构建PGA,很好的实现了单级0-40db增益可调和高频通带达到1MHz以上、低通频带最低0.01Hz以下的项目要求。抑制了输入偏置电平的放大漂移,减小了信号的谐波失真,提高了电路的信噪比。     

激光回波小信号宽带放大器设计

设计了一款激光回波小信号宽带低噪声放大器。选用低噪声、高带宽电流反馈型差分运算放大器THS4509,采用两级放大电路结构以获得较大的放大倍数,利用传输线变压器实现输出信号由双端到单端转换。为减小噪声,采用过渡带特性最好的椭圆低通滤波器滤除带外噪声。经实验验证,该放大器具有40 dB放大倍数、120 MHz带宽和小于10 mV(pp)的系统噪声,能对各种反射率条件下不同目标反射回的微弱激光小信号进行有效放大,较好地解决了远距离和低反射率目标物体测距问题,实际测试测距量程可达450 m。     

可重构连续型 F 类超宽带功率放大器

带宽与效率是功放设计中的两项重要指标,如何使功放同时满足宽频带、高效率的设计要求一直是功放研究的热点和难点之一。本文基于硬件智能化技术和连续理论提出了连续型F类超宽带功率放大器,以连续理论扩大阻抗匹配空间,将传统F类功放推广至连续型F类功放,有效拓宽其工作带宽,并以可重构技术将分散的频段整合为整体。通过测试,该功放在0.9～4 GHz范围内,功率附加效率(power added efficiency, PAE)大于72%,增益约为12.5 dB,饱和输出功率为41 dBm。本设计将可重构技术和连续理论二者优势结合,具有宽频带、高效率、智能性等优点,能够很好地适应5G无线通信系统的需求。     

A programmable analog baseband filter with DC offset reduction using servo loop feedback

This paper presents a programmable analog baseband filter with direct current (DC) offset cancelling, using the standard complementary metal‐oxide‐semiconductor process. The servo loop feedback topology is adopted to reject in‐band DC offset at each stage of the receiving system. Furthermore, the proposed back‐to‐back diode‐connected configuration forms an ultrahigh pseudo resistor, which is applied in the feedback path of the integrator to obtain an ultralow cut‐off frequency (<1 Hz) for the high‐pass response. Therefore, low‐frequency application is possible for simultaneously in‐band DC offset and out‐band interference suppression. A servo loop feedback system with a pseudo resistor is used in the analog baseband filter to verify the concept. The chip is fabricated by using the TSMC 0.13‐um complementary metal‐oxide‐semiconductor process and consumes 43.8 mA from a 1.2 V DC supply voltage. The measured gain variation is from 65.6 to ?3.3 dB with a resolution of 1 dB at a bandwidth of 5 MHz. The bandwidth is adjustable from 1.75 to 10 MHz.