一种双通道时分交替ADC误差半盲校正算法

采样时间偏移误差校正一直是时分交替ADC各通道间失配校正的难点.传统的盲校正方式因采用自身信号作为参考信号,会在某些情况下出现校正出错的情形.在分数阶延时滤波器的基础上,通过在模拟信号中预留一定带宽给校正信号及其失真信息来实现采样时间误差的半盲校正,克服盲校正算法中出现校正出错的情形,并且采用变步长算法,实现了收敛速度和稳态误差的优化,最后给出相应的仿真结果.该算法为时分交替ADC的校正提供了一种新的思路.     

基于时间交替采样技术的高速高精度ADC系统

介绍了一种基于时间交替采样结构的高速ADC系统,整个系统采用全数字方式实现时间交替采样技术,结构灵活多变。使用2片ADC芯片及外围电路、FPGA作为逻辑控制和数据接收缓存,来搭建时间交替ADC系统的硬件电路。其最高采样率可达400MSPS,采样精度为12位。通过分析时间交替ADC系统的原理及其通道误差特性,利用Matlab软件分析通道失配误差来源,对采集到的数据进行误差估计和校正     

高速OFDM系统中分时ADC失配误差校准技术

在高速OFDM接收机中利用分时ADC(TIADC)对接收信号进行采样,解决了单片ADC不能满足传输速率高达数Gb/s的通信系统需求的难题。由于TIADC各通道间的不匹配,时钟失配误差和增益失配误差大大影响了系统性能。在传输速率为4 Gb/s的OFDM系统中,利用4通道TIADC对接收信号进行采样,对两种失配误差和信道进行联合估计与均衡,并针对64QAM符号调制,对TIADC进行采样精度仿真。仿真结果证明,校准后的9位TIADC可以使系统误码率接近理想值。     

时间交替ADC系统的实现

时间交替ADC系统通过几片低速的ADC芯片进行并行交替采样,可以成倍地提高系统的采样频率,同时保持较高的分辨率[1]。但是由于芯片及具体实现过程中一些实际因素的影响,不可避免地会引入通道失配误差[2]。本文利用两片ADC芯片及外围电路来实现时间交替ADC系统,并通过Matlab软件对采样数据进行通道失配误差的估计和校正。Matlab仿真结果表明,该系统的采样率基本上达到了单片ADC的两倍,同时其通道失配误差通过算法校正后得到了有效地消除。     

基于时延滤波的TI ADC采样时间失配校准算法

针对时间交织型模数转换器(TI ADC)子通道间的采样时间失配,提出了一种基于时延滤波的校准算法。该校准算法是一种纯片外校准算法,在片外进行FFT分析并重新拟合理想信号,提取每个子通道信号的时延偏差,再由此偏差计算每个子通道对应的FIR滤波器系数,完成时延偏差的补偿。该校准算法解决了子通道间采样时间失配导致的TI ADC精度不足的问题。将该算法应用于12 GS/s 12 bit ADC交织板。结果表明,无杂散动态范围(SFDR)平均提升了31.356 4 dBc,有效位数(ENOB)平均提升了3.177 6 bit。     

基于FPGA的TIADC并行采样系统设计

介绍一种基于多片ADC的时间交替并行采样设计方法以及在FPGA平台上的实现.着重阐述TIADC并行采样的增益误差、时间误差校正算法及实现.实验结果表明,TIADC并行数据采集系统的结构设计和预处理算法,能较好抑制因相位偏移、时钟抖动等造成的非均匀误差.     

为高性能信号路径选择放大器和ADC

通用模拟前端信号路径由信号源、低噪放大器(LNA)、ADC驱动器、通道滤波器、采样时钟和ADC组成,如图1 所示.     

基于FPGA高速并行采样技术的研究

介绍一种基于四通道ADC的高速交错采样设计方法以及在FPGA平台上的实现。着重阐述四通道高速采样时钟的设计与实现、高速数据的同步接收以及采样数据的校正算法。实验及仿真结果表明,同步数据采集的结构设计和预处理算法,能良好抑制并行ADC输出信号因相位偏移、时钟抖动等造成的失配误差。     

一种并行AD采集系统的通道匹配误差研究

随着现代宽带雷达通讯的发展,对雷达回波信号的采集和目标的特征提取成为研究者关注的焦点.由于雷达回波的高频信号高达几十兆赫兹,时间交替采样模数转换器(ADC)系统便可在其中发挥重要作用,但这种结构会引入时间、增益和偏置3种主要的通道失配误差.该文对通道失配误差作了分析,建立了3种误差并存的非均匀采样信号频谱的数学模型,并在此基础上提出了该文的误差联合测量高效实时校正算法,最后在现场可编程门阵列(FPGA)中完成了整个算法的实现.     

在机车横向振动信号模数转化中的应用

基于TMS320LF2407 DSP模数转换模块(ADC)直接应用于机车横向振动信号A/D转化、实现串行高速采样的目的,采用对ADC模数转化进行软件编程的方法,通过合理安排转换通道、设计系统要求的采样频率和A/D转化,通过分析计算和误差分析,DSP ADC能够最大限度缩小串行采样与并行采样之间误差,能够满足DSP控制系统的需要,在设计硬件电路中,完全可以利用DSP集成的DAC模块。     

Hermite脉冲超宽带系统在多径信道的性能分析

研究了一种基于Hermite脉冲的超宽带系统在多径信道下的性能。考虑到定时抖动对Rake相关接收的影响,通过Hermite脉冲的相关函数可以计算Rake捕获的信号能量,进而得到接收机的输出信干比。在假设符号间干扰为高斯噪声下,得出系统在多径信道下的理论误比特性能。结果表明,符号间干扰能量对Rake接收机合并路径数目的变化并不敏感;增加合并路径数目可以提高系统的误比特性能;大的定时抖动范围会造成系统性能下降。     

Comparison of four FFT-based frequency acquisition techniques forCostas loop BPSK signal demodulation

This paper discussed four open-loop frequency acquisition techniques for suppressed-carrier BPSK signals. The techniques, which do not require accurate symbol timing nor a data preamble sequence, employ fast Fourier transforms (FFT's) on the Costas loop phase detector output to detect the Doppler frequency offset. Performance of the full-, half-, and staggered-symbol integration techniques as well as the low-pass filter technique are compared in terms of the error signal output SNR's. Then, the probability of detecting the frequency offset is computed for the special case when the frequency of the tone to be detected coincides with one of the FFT-bin center frequencies. It is shown that the performance of the integration techniques depends strongly on the symbol timing offset. On the other hand, the detection probability for the one-pole arm filter technique depends directly on the filter bandwidth. The staggered integration technique is shown to have comparable performance to the low-pass filter technique for low-to-medium symbol SNR's but the latter is superior at high symbol SNR's     

Direct frequency changer operation under a new scalar controlalgorithm

A thorough analysis of a scalar control method for the operation of direct frequency changers (DFC) using bidirectional switches operating at high switching frequencies is proposed. The method allows full control over voltage and frequency at the output port and the input side power displacement factor, with little effect on the frequency spectrum of either the output voltage or input currents. The method uses the instantaneous voltage ratio of specific input phase voltages to generate the active and zero states of the various switches. A voltage transfer ratio as high as 0.87 is obtained under synchronous and asynchronous operation with a conventionally connected three-phase load. Analysis shows that the input power displacement factor is independent of load characteristics. The power displacement can be precisely controlled by proper adjustments of the timing sequence. Synchronization error in the timing sequence affects both the input power displacement and the voltage transfer ratio     

Timing synchronization using cross ambiguity function for MIMO OFDM systems with distributed antennas

In this letter, we propose a novel timing offset estimation method for multiple input multiple output (MIMO) orthogonal frequency division multiplexing (OFDM) systems with distributed antennas using cross ambiguity function (CAF). The proposed algorithm has an impulse-shaped timing metric which allowed it to reduce the uncertainty due to the timing metric plateau. Simulation results show that the mean square error (MSE) performance of the proposed method is significantly improved.     

UFMC-MIMO系统中一种干扰消除算法

通用滤波多载波(UFMC)作为5G最具潜力的候选波形之一,它的优势在于比正交频分复用(OFDM)具有更低的带外泄露,且发送时不需要添加循环前缀(CP),还能与多输入多输出(MIMO)系统良好地兼容。然而现有对UFMC的研究多数停留在单输入单输出(SISO)系统,已不能满足5G及未来通信系统的需要,因此对UFMC-MIMO系统的研究具有重要意义。本文提出一种利用Walsh码设计的特殊训练结构对UFMC-MIMO系统进行定时同步的算法,首先对各信道进行定时同步,再对经过定时同步后的信号作频偏估计得到各发送天线与接收天线的频偏估计值,最后在时域对信号进行频偏补偿,从而达到降低或消除定时频偏对信号传输的影响。本文基于2×2的UFMC-MIMO系统进行仿真,结果表明该算法能够有效降低信号误符号率和显著提升系统的抗干扰性能。     

一种简单实用的差频方法原理研究及应用

介绍了D触发器差频的方法和应用条件，用最基础的时序分析的方法,对D触发器差频做一个理论上的验证,定量给出应用条件，并分析了产生误差的原因和最大的误差范围。同时，对这一方法的应用范围进行了拓展，给出了输入方波不对称时，对占空比限制的关系式。我们用软件仿真和试验结果验证了结论．并介绍了我们如何将D触发器差频方法用在湿度传感器的频率检测上。     

On the convergence of Volterra filter equalizers using a pth-orderinverse approach

The pth-order inverse method is one of important approaches to Volterra equalization. However, when a pth-order Volterra equalizer instead of an exact Volterra equalizer is connected in cascade before (after) a nonlinear system, the existence of Volterra filter equalization and the approximation output error bound of the resulting system have yet to be reported. In this paper, the concept of local l ² stability for a Volterra system is introduced, and the algorithmic formulae of a pth-order inverse equalizer via a multidimension z-transform are presented. The output error signal and the approximation output error bound of the resulting system are investigated as well. It is shown that the approximation output error tends to zero as p tends to infinity for a finite range of input amplitude values. Finally some simulation results are presented and discussed     

Precoder Distribution and Adaptive Codebook in Wideband Precoding

Based on wideband precoding (WBP) in the multiple‐input multiple‐output orthogonal frequency division multiplexing system, an adaptive nonuniform codebook is presented in this paper. The relationship between the precoder distribution and spatial correlation is analyzed at first. A closed‐form expression based on overlapped isosceles triangles is proposed as an approximation of the precoder distribution. Then, the adaptive codebook design is derived with the approximate distribution to minimize quantization errors. The capacity and bit error rate performance demonstrate that the adaptive codebook with WBP outperforms the conventional fixed uniform codebook.     

一种基于插值的定时同步算法研究

基于MSK调制通信系统,采用四阶差分定时误差检测算法对基于插值的定时同步环路进行了研究和分析,并提出了一种以插值输出信号均方误差最小为准则的插值滤波器设计,提高滤波器输出精度,改善定时同步环路同步性能。通过MATLAB仿真验证,与Lagrange插值滤波器相比,基于最小均方插值的定时同步算法,跟踪阶段定时抖动小,对噪声具有抑制作用,在信噪比较低的情况下也具有较好的同步性能。     

一种低信噪比解调的实现方案及性能仿真

高效率编码技术(如LDPC,Turbo码)的发展迫切要求降低解调门限。提出一种适用于QPSK调制方式的低信噪比解调方案,该方案采用频域非线性定时估计算法进行定时误差估计,利用FFT进行载波频差估计,利用周期性插入的导频序列进行载波相位估计。首先仿真了定时误差和载波相位误差对解调性能的影响,并在此基础上确定了算法的具体参数,最后对解调器的综合性能进行了仿真,仿真结果表明上述算法在Es/N0=2dB时的解调性能恶化小于0.5 dB。