共查询到19条相似文献,搜索用时 149 毫秒
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A new blind equalization algorithm for complex valued signals was proposed based on the framework of complex support vector regression(CSVR).In the proposed algorithm,the error function of multi-modulus algorithm (MMA) was substituted into CSVR to construct the cost function,and the regression relationship was established by widely linear estimation,and the equalizer coefficients were determined by the iterative re-weighted least square (IRWLS) method.Different from spliting the complex valued signals into real valued signals used in support vector regression,the Wirtinger’s calculus was used in complex support vector regression to analyze the complex signals directly in the complex regenerative kernel Hilbert space.Simulation experiments show that for QPSK modulated signals,compared with the blind equalization algorithm based on support vector regression,the equalization performance of the proposed algorithm is significantly improved in linear channel and nonlinear channel by choosing appropriate kernel function and iterative optimization method. 相似文献
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光器件是航天器最重要的部件,受到世界各国的高度重视。文章介绍了航天用光器件可靠性技术及其进展。为了满足重量轻、低功耗和高可靠性的空间高技术需要,概述了光纤激光器、大功率半导体激光器、HgCdTe红外探测器、光纤陀螺的可靠性技术。重点叙述了可靠性试验技术与标准,可靠性分析与评价,包括光纤激光器和大功率半导体激光器在内的航天用光源的可靠性,有关大功率激光器寿命评估、失效机理、热产生机制与能耗,大功率激光器可靠性与寿命进展,以及提高大功率激光器可靠性得措施。可以肯定,随着可靠性技术的发展,光器件在未来航天领域中将占据越来越重要的位置。 相似文献
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平面稀布天线阵列的优化算法 总被引:2,自引:0,他引:2
基于一种改进的实数遗传算法,以降低平面稀布阵旁瓣电平为优化目标,提出了一种综合有阵元数约束、孔径约束和最小阵元间距约束的稀布面阵的新方法。与稀疏布阵相比,该方法利用了阵元在布阵时更大的自由度,因而在阵元数、孔径和最小阵元间距相同的条件下可以获得更优的峰值旁瓣性能,仿真试验显示了改进的实数遗传算法应用到该多约束稀布平面阵优化问题中是稳健和高效的。 相似文献
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随着信号处理算法的发展,人们对航天用现场可编程门阵列(Field Programmable Gate Array, FPGA)提出了算法可更新的需求。而传统的固定算法模式已经无法满足要求,所以星上FPGA在轨可重构设计成为了解决这一问题的关键。提出了一种基于星地链路的FPGA在轨可重构设计方案。通过星地链路上载配置数据并将其存入电可擦除只读存储器(Electrically Erasable Programmable Read Only Memory, EEPROM)内,然后利用反熔丝器件对FPGA进行大规模算法重配置操作。这项设计方案已经通过了相关验证,同时也提升了星载FPGA的灵活性。 相似文献
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随着半导体器件参数的增加,目标函数的自变量空间维数变得越来越大。传统的优化算法已经不能很好地处理此类问题,主要表现在无法有效地达到目标函数的极小点。文章首先在参数提取软件中实现了遗传算法,并与传统的优化算法进行了比较,探讨了该算法在参数提取软件中的实用性,提出了将遗传算法与传统优化算法结合在一起的方法。 相似文献
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Effect of floating-body charge on SOI MOSFET design 总被引:2,自引:0,他引:2
This work presents a new method for assessing the effect of floating-body charge on a fully- and partially-depleted Silicon-on-Insulator (SOI) MOSFET device design space. Floating-body effects under transient conditions are incorporated into the device design parameters threshold voltage VT and off-current I0FF using calibrated two-dimensional (2-D) device simulation. Simulation methodology which reveals the worst-case bounds of the device design parameters, from idle to switching-steady-state, is presented and applied to a CMOS inverter example. Using this methodology, the worst-case shifts in VT and I0FF due to hysteretic floating-body charge are quantified for devices in L eff=0.2- and 0.1-μm design spaces. Methods to reduce floating-body effects are discussed including a demonstration of how reducing the effective bulk carrier lifetime widens the 0.1-μm design space 相似文献