GaAlAs红外发光二极管功率老化对其1/f噪声特性的影响

在可靠性筛选中检测具有潜在损伤的器件一直是个难题.对GaA lAs红外发光二极管(IRLED)功率老化前后低频噪声的测量发现,1/f噪声幅值与偏置电流的γ次方成正比(小电流区γ=1,在大电流区γ≈2),且老化后1/f噪声幅值比老化前增大2个数量级.基于载流子数涨落和迁移率涨落机制建立了一个GaA lAs IR LED的1/f噪声模型,分析结果表明GaA lAs IR LED的1/f噪声在小电流时反映体陷阱特征,大电流时反映激活区陷阱特征,1/f噪声的增加归因于功率老化诱生的界面陷阱和表面陷阱,1/f噪声可以用来检测GaA lAs IR LED s的潜在缺陷.     

GaAlAs血红外发光二极管功率老化对其1/f噪声特性的影响

在可靠性筛选中检测具有潜在损伤的器件一直是个难题。对GaAlAs红外发光二极管（IRLED）功率老化前后低频噪声的测量发现，1／f噪声幅值与偏置电流的γ次方成正比（小电流区γ≈1，在大电流区γ≈2），且老化后1／f噪声幅值比老化前增大2个数量级。基于载流子数涨落和迁移率涨落机制建立了一个GaAlAs IR LED的1／f噪声模型，分析结果表明GaAlAs IR LED的1／f噪声在小电流时反映体陷阱特征，大电流时反映激活区陷阱特征，l／f噪声的增加归因于功率老化诱生的界面陷阱和表面陷阱，1／f噪声可以用来检测GaAlAs IR LEDs的潜在缺陷/     

光电耦合器电流传输比的噪声表征

光电耦合器中可俘获载流子的陷阱密度是影响其电流传输比(CTR)的重要因素,并与器件可靠性有密切关系.在器件内部的多种噪声中,1/f噪声可有效地表征器件陷阱密度.本文在研究光电耦合器工作原理以及1/f噪声理论的基础上,建立了光电耦合器的CTR表征模型和1/f噪声模型.在输入电流宽范围变化的条件下,测量了器件的电学噪声和CTR变化,实验结果验证了以上模型的正确性.将CTR模型与噪声模型相结合,得到了CTR与1/f噪声之间的关系.此关系应用于对光电耦合器辐照实验结果的分析,实验结果与理论得到的结论一致.理论与实验结果表明,噪声幅值越大,电流指数越接近于2,则器件的可靠性越差,相同工作条件下CTR的老化衰减量越大,其失效率显著增大.从而证明噪声可表征光电耦合器的CTR并能准确地反映器件的可靠性.     

光电耦合器电流传输比的噪声表征

光电耦合器中可俘获载流子的陷阱密度是影响其电流传输比(CTR)的重要因素,并与器件可靠性有密切关系.在器件内部的多种噪声中,1/f噪声可有效地表征器件陷阱密度.本文在研究光电耦合器工作原理以及1/f噪声理论的基础上,建立了光电耦合器的CTR表征模型和1/f噪声模型.在输入电流宽范围变化的条件下,测量了器件的电学噪声和CTR变化,实验结果验证了以上模型的正确性.将CTR模型与噪声模型相结合,得到了CTR与1/f噪声之间的关系.此关系应用于对光电耦合器辐照实验结果的分析,实验结果与理论得到的结论一致.理论与实验结果表明,噪声幅值越大,电流指数越接近于2,则器件的可靠性越差,相同工作条件下CTR的老化衰减量越大,其失效率显著增大.从而证明噪声可表征光电耦合器的CTR并能准确地反映器件的可靠性.     

低偏置电流下大功率半导体激光器低频电噪声特性

测量了大功率InGaAsP/GaAs量子阱半导体激光器在五十分之一阈值电流下的电压低频噪声功率谱密度.实验结果显示,激光器的低频电噪声呈现1/f噪声,在不同的偏置电流范围内,1/f噪声幅度随电流的变化关系不同,整体上随偏置电流的增大而减小,实验中并未发现g-r噪声.结合低偏置电流时激光器动态电阻的大小,给出了1/f噪声的模型,分析了在低偏置电流下的1/f噪声主要来自有源区和漏电电阻,其幅度的大小及其随偏置电流的变化趋势与激光器的可靠性有密切的关系.     

电应力对GaAlAs红外发光二极管低频噪声的影响

在宽范围偏置条件下,测量了电应力前后GaAlAs红外发光二极管（IRED）的低频噪声,发现应力前后1／f噪声随偏置电流变化的规律没有改变,但应力后1／f噪声幅值比应力前增加大约i00倍。基于载流子数和迁移率涨落的理论分析表明,GaAlAs IRED的1／f噪声在小电流时反映体陷阱特征,大电流时反映激活区陷阱特征,1／f噪声的增加归因于电应力在器件有源区诱生的界面陷阱和表面陷阱,因而,1／f噪声可以用来探测电应力对该类器件有源区的潜在损伤。     

硅基N沟道VDMOS不同偏置下总剂量效应研究

通过⁶⁰Co γ射线辐照试验,研究了不同栅极和漏极偏置下硅基N沟道VDMOS器件的总剂量效应,获得了器件的电学特性与低频噪声特性随辐射总剂量的变化规律。试验结果表明：受辐射诱生的氧化物陷阱电荷与界面陷阱电荷的影响,在栅极偏置为+20 V时,器件的电学特性随累积剂量的增大而退化明显。通过退火试验发现,相比于导通电阻和正向压降,阈值电压、漏电流、亚阈值摆幅和输出电容对于总剂量辐射更加敏感。而在低频噪声特性方面,辐照后器件的沟道电流归一化噪声功率谱密度与正栅极偏置呈现正相关性,与负栅极偏置呈现负相关性。在不同漏极偏置条件下,辐照后器件的沟道电流归一化噪声功率谱密度降低,且基本重合。依据噪声模型,认为N沟道VDMOS内部局域电场分布对辐射感生陷阱电荷的形成影响显著,导致器件Si/SiO₂界面或者附近的载流子与陷阱交换引起的沟道电流波动不同,成为低频噪声主要来源。研究结果可为N沟道VDMOS器件的辐射效应评估、筛选和抗辐射加固设计提供参考。     

光电耦合器件g-r噪声模型

在宽范围偏置条件下,测量了光电耦合器件的g-r(产生-复合)噪声.实验结果表明,随着偏置电流的增加,g-r噪声逐渐向高频移动,其噪声幅值呈现先增加后减小的变化规律.通过测量前级噪声和后级噪声,发现光电耦合器件g-r噪声来源于后级的光敏三极管.基于载流子数涨落机制,建立了一个光电耦合器件g-r噪声的定量分析模型.实验结果和本文模型符合良好.     

混合集成光电耦合器噪声特性研究

光电耦合器件作为光电混合器件比一般分立器件结构复杂，其内部噪声的种类较多，在低频时主要表现为1/f噪声，高频时主要表现为散粒噪声。本文在介绍光电耦合器件工作原理的基础上，从理论上分析了1/f噪声产生机理。设计了噪声测量方法，并通过对其测量结果分析，深入研究了噪声和光电耦合器质量与可靠性的关系。     

光电耦合器件g-r噪声模型

在宽范围偏置条件下，测量了光电耦合器件的g-r（产生-复合）噪声．实验结果表明，随着偏置电流的增加，g-r噪声逐渐向高频移动，其噪声幅值呈现先增加后减小的变化规律．通过测量前级噪声和后级噪声，发现光电耦合器件g-r噪声来源于后级的光敏三极管．基于载流子数涨落机制，建立了一个光电耦合器件g-r噪声的定量分析模型．实验结果和本文模型符合良好．     

基于低频电噪声的光电耦合器可靠性筛选方法研究

低频电噪声是表征电子器件质量和可靠性的敏感参数,通过测试低频噪声,可以快速、无损地实现光耦器件的可靠性评估。通过开展可靠性老化对光电耦合器低频噪声特性影响的试验研究,提出基于低频段宽频带噪声参数的光电耦合器可靠性筛选方法,并将可靠性筛选结果与点频噪声筛选方法结果进行对比分析。结果表明,与点频噪声参数等现有方法相比,宽频带噪声参数可以更灵敏和准确地表征器件可靠性,同时计算简便,基于宽频带噪声参数的光电耦合器可靠性筛选方法可以实现更为准确合理的可靠性分类筛选。     

大功率InGaAsP/GaAs量子阱半导体激光器的直流和1/f噪声性质

对大功率InGaAsP/GaAs量子阱(QW)半导体激光器(LD)的直流(DC)特性和小注入下的低频噪声(LFN)特性进行了实验研究.DC检测发现,V-J和I dV/dI-I可以对LD的电流泄漏作出判断.LFN检测发现,小注入下的1/f低频电压噪声幅值Bv(I)∝I<'βv>.理论分析和老化实验均表明,电流指数βv与载流子输运和电流泄漏机制之间有很好的相关性,存在电流泄漏和无辐射复合的器件其|βv|较小,可靠性较差.     

Origin of low-frequency noise in pentacene field-effect transistors

Measurements of power spectral density (PSD) of low-frequency noise (LFN) in pentacene field-effect transistors reveal the preponderance of a 1/f-type PSD behavior with the amplitude varying as the squared transistor gain and increasing as the inverse of the gate surface area. Such features impose an interpretation of LFN by carrier number fluctuations model involving capture/release of charges on traps uniformly distributed over the gate surface. The surface slow trap density extracted by the noise analysis is close to the surface states density deduced independently from static I(V) data, which confirms the validity of the proposed LFN interpretation. Further, we found that the trap densities in bottom-contact (BC) devices were higher than in their top-contact (TC) counterparts, in agreement with observations of a poorer crystal structure of BC devices, in the contact regions in particular. At the highest bias the noise originating from the contact resistance is also shown to be a dominant component in the PSD, and it is well explained by the noise originating from a gate-voltage dependent contact resistance. A gate area scaling was also performed, and the good scaling and the dispersion at the highest bias confirm the validity of the applied carrier number fluctuations model and the predominant contact noise at high current intensities.     

Low frequency noise sources in InAlAs/InGaAs MODFETs

Detailed analysis of the 1/f low-frequency noise (LFN) in In/sub 0.52/Al/sub 0.48/As/InGaAs MODFET structures is performed, for low drain bias (below pinch-off voltage), in order to identify the physical origin and the location of the noise sources responsible for drain current fluctuations in the frequency range 0.1 Hz-10/sup 5/ Hz. Experimental data were analyzed with the support of a general modeling of the 1/f LFN induced by traps distributed within the different layers and interfaces which constitute the heterostructures. Comparative noise measurements are performed on a variety of structures with different barrier (InAIAs, InP) and different channel (InGaAs lattice matched to InP, strained InGaAs, InP) materials. It is concluded that the dominant low frequency noise sources of InAlAs/InGaAs MODFET transistors in the ON state are generated by deep traps distributed within the "bulk" InAlAs barrier and buffer layers. For reverse gate bias, the gate current appears to be the dominant contribution to the channel LFN, whereas both the gate current and the drain and source ohmic contacts are the dominant sources of noise when the device is biased strongly in the ON state. Heterojunction FET's on InP substrate with InP barrier and buffer layers show significantly lower LFN and appear to be more suitable for applications such as nonlinear circuits that have noise upconversion.     

On Charge Transport and Low-Frequency Noise in the GaN p-i-n Diode

The current-voltage (I-V) characteristics and low-frequency noise of the GaN p-i-n diodes were investigated in temperature range from 10 K to 300 K. We found that the reverse biased p-i-n diode made of GaN/AlGaN exhibits features of the space charge limited (SCL) current flow and its I-V characteristics can be approximated by the power law I~Vⁿ relation. This phenomenon can be attributed to the presence of the multiple charge traps in the intrinsic region of device. It has been demonstrated that the direct tunneling from traps to bands may occur in diodes at forward and reverse bias with strong support of the Frenkel effect. The low frequency noise in our devices does not depend on temperature in both bias directions under cryogenic conditions. The observed low-frequency noise features support the hypothesis that excess tunneling current and recombination at grain boundaries are origins of the 1/f low-frequency noise in the diode at forward bias. The 1/f noise in the reverse bias regime can be described as a composition of many Lorentzian noise components that originate from traps, which have specific depth distribution     

Low-frequency noise in UHV/CVD epitaxial Si and SiGe bipolartransistors

In this work a comprehensive investigation of low-frequency noise in ultrahigh vacuum/chemical vapor deposition (UHV/CVD) Si and SiGe bipolar transistors is presented. The magnitude of the noise of SiGe transistors is found to be comparable to the Si devices for the identical profile, geometry, and bias. A comparison with different technologies demonstrates that the SiGe devices have excellent noise properties compared to AlGaAs/GaAs heterojunction bipolar transistors (HBT's) and conventional Si bipolar junction transistors (BJT's). Results from different bias configurations show that the 1/f base noise source is dominant in these devices. The combination of a 1/Area dependence on geometry and near quadratic dependence on base current indicates that the 1/f noise sources are homogeneously distributed over the entire emitter area and are probably located at the polysilicon-Si interface. Generation/recombination (Gm) noise and random telegraph signal (RTS) noise was observed in selected Si and SiGe devices. The bias dependence and temperature measurements suggest that these G/R centers are located in the base-emitter space charge region. The activation energies of the G/R traps participating in these noise processes were found to be within 250 meV of the conduction and valence band edges     

Investigation of the Device Degradation Mechanism in Pentacene-Based Thin-Film Transistors Using Low-Frequency-Noise Spectroscopy

The degradation process in pentacene-based organic thin-film transistors (OTFTs) is investigated. Pentacene-based OTFTs were fabricated with and without octadecyl trichlorosilane (OTS) treatment, and their device characteristics during lifetime test are evaluated using low-frequency-noise (LFN) spectroscopy. It is found that the devices exhibited the $hbox{1}/f$ type of noise behavior with generation and recombination noise superimposed. The drain-current noise was found to vary proportionally with drain current according to Hooge's empirical relation of flicker noise. Devices without any treatment show obvious interface traps and deep-level traps, while devices with OTS treatment show nonexistence of interface traps and suppression of deep-level traps. The LFN intensity is found to decrease during the device lifetime test initially, while upon the device failure, the noise level is observed to increase again. The viability of using LFN as a diagnostic tool in the organic transistor is demonstrated.      

Low-frequency noise properties of selectively dry etched InP HEMT's

The low-frequency noise of lattice-matched InAlAs/InGaAs/InP high electron mobility transistors (HEMT's) gate recess etched with a highly selective dry etching process and with conventional wet etching were studied at different gate and drain biases for the temperature range of 77-340 K. The measurements showed a significantly lower normalized drain current 1/f noise for the dry etched HEMT's under all bias conditions. No difference in the normalized gate current 1/f noise could be observed for the two device types. By varying the temperature, four electron traps could be identified in the drain current noise spectra for both dry and wet etched devices. No additional traps were introduced by the dry etching step. The concentration of the main trap in the Schottky layer is one order of magnitude lower for the dry etched HEMT's. No hydrogen passivation of the shallow donors was observed in these devices. We presume hydrogen passivation of the deep levels as the cause for the trap density reduction. The kink effect in the dry etched HEMT's was observed to be reduced significantly compared with wet etched devices which gives further evidence of trap passivation during dry etching. These results show that dry etched InP HEMT's have suitable characteristics for the fabrication of devices for noise sensitive applications