A hardware in the loop simulation platform for vision-based control of unmanned air vehicles

Design and testing of control algorithms for unmanned air vehicles (UAV’s) is difficult due to the delicate and expensive nature of UAV systems, the risk of damage to property during testing, and government regulations. This necessitates extensive simulation of controllers to ensure stability and performance. However, simulations cannot capture all aspects of a flight control, such as sensor noise and actuator lag. For these reasons, hardware in the loop simulation (HILS) platforms are used. In this paper, a novel HILS platform is presented for vision-based control of UAV’s. This HILS platform consists of virtual reality software to produce realistic scenes projected onto a screen and viewed by a camera. Flight hardware includes an UAV with onboard autopilot interfaced to the virtual reality software. This UAV can be mounted in a wind tunnel, allowing attitude regulation through servoing the airfoils.     

A new design of prefilter for reducing timing synchronization jitter

For high‐precision timing synchronization in feedback Gardner algorithm and different feedforward nonlinear algorithms, timing jitter reduction is the key problem, especially with a small roll‐off factor in high‐order modulation. Through the elaborate analysis about the timing jitter, this paper proposes a new prefilter design method based on finite impulse response structure. Using a suitable Kaiser window for suppressing the sidelobe energy of the proposed prefilter, this method can further decrease the complexity of filter design and eliminate most part of the pattern noise. Compared with the previous prefilter design algorithms, the approach has a better improvement in steady‐state phase jitter reduction without increasing the capture time in Gardner timing error detector. Meanwhile, with such kind of prefilter, the performance of logarithmic nonlinearity is better than that of square law nonlinearity, this is not reported in literature. Simulation results show that the residual timing jitter in both kinds of algorithms is closed to the modified Cramer‐Rao bound when the roll‐off factor is equal to 0.1 in 1024QAM.     

An Analytical Approach for Quantifying Clock Jitter Effects in Continuous-Time Sigma–Delta Modulators

Continuous-time sigma–delta modulators (CTSDMs) may suffer severe performance degradation from the timing error in a quantizer clock. We present an analytical approach to quantify the performance loss due to clock jitter in a CTSDM. Unlike many prior works that model the timing error of clocks as additive white Gaussian phase noise, we propose a jitter model that exhibits an auto-regression form, so we term it auto regressive (AR) jitter. This AR jitter model shows exactly the same jitter behavior as that of a clock generated by practical phase-locked loops. Based on this AR jitter model, we establish an analytical approach to examine the intricate effects of clock uncertainty on CTSDM system performance. We demonstrate the validity of the proposed analytical method by showing its excellent agreement with simulation results. The analytical method enables a profound insight into the problem of how clock jitter degrades the system performance and also provides a guideline on how to minimize the detrimental effects of clock jitter.     

Digital filter and square timing recovery

The digital realization of timing recovery circuits for digital data transmission is considered. A digital algorithm is proposed that can be implemented very efficiently even at high data rates. The resulting timing jitter has been computed and verified by simulations. In contrast to other known algorithms, the one presented here allows free-running sampling oscillators and a novel planar filtering method that prevents synchronization hangups     

定时综合的数字相位方法

本文提出了在相位量化下的高精度定时综合理论,并基于Ｖｉｔｅｒｂｉ算法提出一种最优合成方法,同时还给出了基于Ｔ－Ｖｉｔｅｒｂｉ的简化方法并对Ｔ－Ｖｉｔｅｒｂｉ和二阶Ｓｉｇｍａ－ＤｅｌｔａＭｏｄｕｌａｔｉｏｎ（ＳＤＭ）方法进行了分析和性能比较,仿真结果表明这两种方法在量化精度上大大优于传统的一阶ＳＤＭ的方法,最后,本文给出了一个最优化算法在ＳＤＨ漂移产生中的应用实例。     

基于单比特采样的IR-UWB系统采样抖动性能分析

研究了基于单比特采样接收的IR—UWB系统中采样抖动对性能的影响。论文给出了采样抖动的简化分析模型,推导了AWGN信道下全精度采样系统和单比特采样系统的误码率理论解。论文通过仿真实验验证了理论分析的正确性,并分析比较了全精度采样系统、单比特采样系统在AWCN信道与多径衰落信道下的抗采样抖动性能及其原因。     

对2R全光再生器时间抖动抑制的研究

研究了利用二次再生结构来抑制光纤自相位调制全光再生器引起的时间抖动。根据转移函数的输出特性,分析了A-A、B-B和C-C 3种类型的二次再生器对时间抖动抑制的性能,并利用分布傅里叶算法进行了仿真。理论和数值结果表明:C-C结构的二次再生器对时间抖动抑制效果最好,B-B型次之,而A-A型则会加剧再生信号的时间抖动。造成二次再生器对抑制时间抖动性能差异的主要原因是,第一级再生器会通过输出脉冲幅度的变化对第二级再生器的时间抖动造成影响。     

全数字接收机平方定时恢复环路

本文着重研究全数字接收机中定时恢复环路的设计,该环路由内插滤波器,预滤波器,平方定时误差检测,环路滤波和 定时控制单元组成,仿真结果表明,通过预滤波明显减小了定时抖动,该算法可以达到较好的性能,并由单片FPGA实现, 该芯片已成功用于QAM全数字接收机中。     

Simulation of MC-CDMA in the Presence of Timing Errors

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Analysis of a serial symbol timing recovery technique employingExclusive-OR circuit

An analysis is presented of the performance of a serial symbol timing recovery (STR) circuit which employs an Exclusive-OR circuit for conventional coherent digital modulated communication systems. The output of the timing circuit is a nearly sinusoidal wave whose zero crossings indicate the appropriate sampling instants for extraction of the data. Assuming that the data pulses entering the timing path are even symmetric, exact analytical expressions for the mean and mean-squared values of the timing wave and for the RMS phase jitter are derived as a function of various system parameters such as channel band limiting, postfiltering, delay element, and power spectral density of noise. Numerical results, also checked by computer simulations, show that considerable improvement can be obtained in jitter performance, in addition to the advantages over other STR techniques of lower cost and simpler hardware implementation     

辐射时序对单站无源跟踪性能的影响

针对射频隐身平台采取辐射时序控制的情况,以基于角度/相位差变化率/多普勒频率变化率的单站无源跟踪为例,研究了辐射时序与跟踪性能的影响关系。在辐射源做匀速运动的假设下,采用克拉美劳下界方法,建立了辐射时序对跟踪性能的影响模型。模型综合考虑了辐射时序、观测量误差、导航误差等因素,与具体的跟踪算法无关,因此具有实用性和客观性。基于影响模型的仿真分析,揭示了辐射时序不同特征对跟踪性能的影响规律,为射频隐身平台辐射时序设计提供了初步的理论指导。     

Jitter requirements of the sampling clock in software radio receivers

The effective number of bits of an analog-to-digital converter (ADC) is not only limited by the quantization step inaccuracy but also by sampling time uncertainty. According to a commonly used model, the error caused by timing jitter, integrated over the whole bandwidth, should not be bigger than the quantization noise, for a full swing input signals at the maximum input frequency. This results in unfeasible phase noise requirements for the sampling clock in software radio receivers with direct RF sampling. However, for a radio receiver not the total integrated error is relevant, but only the error signal in the channel bandwidth. This paper explores the clock jitter requirements for a software radio application, using a more realistic model and taking into account the power spectrum of both the input signal and the spectrum of the sampling clock jitter. Using this model, we show that the clock jitter requirements are very similar to reciprocal mixing requirements of superheterodyne receivers.     

The effect of timing jitter on the performance of a discretemultitone system

The transmission of high-speed data over severely band-limited channels may be accomplished through the use of discrete multitone (DMT) modulation, a modulation technique that has been proposed for a number of new applications. While the performance of a DMT system has been analyzed by a number of authors, these analyses ignore the effect of timing jitter on system performance. Timing jitter becomes an increasingly important concern as higher data rates are supported and larger constellations are allowed on the DMT subchannels. Hence, in this paper, we assume that synchronization is maintained by using a digital phase-locked loop to track a pilot carrier, Given this model, we derive error rate expressions for an uncoded DMT system operating in the presence of timing jitter, and we derive an expression for the interchannel distortion that results from a varying timing offset across the DMT symbol. In addition, we investigate the performance of trellis-coded DMT modulation in the presence of timing jitter. Practical examples from the asymmetric digital subscriber line (ADSL) service are used to illustrate various results     

基于视景仿真的导弹制导控制系统设计平台

现有制导控制系统设计开发平台的技术复杂性与快速开发之间形成了突出的矛盾,而且普遍存在设计平台维护成本高、扩展性差等一系列问题。针对以上问题,建立了导弹制导控制系统的各个子模型,研发了导弹制导控制系统设计平台。平台将视景仿真功能与数字仿真功能相结合,建立制导控制系统仿真环境,并将导弹仿真数据进行实时显示及结果复现,用三维动画图像的方式,来展示导弹弹道轨迹、位置姿态、自身状态、传感器覆盖范围等,对目标识别、弹着点预测、引战配合攻击效果评估等分析结果进行可视化,更清晰地描述出制导控制系统的实时运行状态,在提高导弹制导控制系统设计性能和质量等方面具有积极的意义。     

Adjacent-Channel and Quadrature-Channel Interference in Minimum Shift Keying

In this paper we present formulas for the computation of error probability in the presence of quadrature-channel or adjacentchannel interference in addition to intersymbol interference in a minimum shift keying system. The filters in the receiver and transmitter are arbitrary but with a finite number of poles. The effect of phase jitter in the main channel, phase and symbol timing misalignment in the interfering channels, and sampling time jitter is taken into account. The probability of error is averaged over the phase and symbol timing misalignment. Numerical results are presented for Butterworth filters in the receiver and transmitter with two, three, and four poles. Curves of error probability as a function of various variables (signal-to-noise ratio, bandwidth of receiver and transmitter filters, number of poles, channel frequency separation, phase jitter, sampling time, and symbol timing and phase misalignment) are presented. The method of this paper can readily be applied to other filters; hence, it can be used in the design and prediction of the performance of digital communication systems.     

Fault-tolerant vibration control in a networked and embedded rocket fairing system

Active vibration control using piezoelectric actuators in a networked and embedded environment has been widely applied to solve the rocket fairing vibration problem. However, actuator failures may lead to performance deterioration or system dysfunction. To guarantee the desired system performance, the remaining actuators should be able to coordinate with each other to compensate for the damaging effects caused by the failed actuator in a timely manner. Further, in the networked control environment, timing issues such as sampling jitter and network-induced delay should be considered in the controller design. In this study, a timing compensation approach is implemented in an adaptive actuator failure compensation controller to maintain the fairing system performance by also considering the detrimental effects from real-time constraints. In addition, time-delay compensation in the networked control system is discussed, which is able to reduce damaging effects of network-induced delays.     

色散管理孤子系统中时间抖动性能的分析

研究了色散管理孤子(DMS)系统中影响时间抖动性能的各个因素。理论分析得出：色散管理(DM)的累积色散、附加累积色散和DM强度是影响时间抖动的重要因素,降低路径平均色散和增大DM强度均能减小时间抖动;附加累积色散对系统时间抖动影响较大,当它等于传输总累积色散量的1／2时,时间抖动最小。数值计算的结果验证了理论分析的正确性,得出的结论对DMS系统中时间抖动性能的改善有一定的帮助。     

Jittery Signal Generation for High-Speed Interconnect Simulation

By generating clock and data waveforms in the frequency domain through a truncated Fourier series, absolute control over both voltage noise and symbol transition timing is achieved. A parameterized Fourier series signal model is derived and used to form clock and data waveforms exhibiting arbitrary noise and jitter characteristics. The method not only facilitates more accurate interconnect modeling in tools like Matlab and Simulink, but also provides a simple means for generating realistic signals that may be imported into Spice-based simulators.      

Effect and Compensation of Colored Timing Jitter in Pulsed UWB Systems

Ultra-wideband (UWB) systems impose a stringent requirement on the jitter performance of the system clock. So far, only the effect of white Gaussian timing jitter has been considered in the literature via numerical simulation. However, practical clocks commonly exhibit colored jitter. In this paper, we first investigate the bit error rate (BER) performance of a single-user binary pulse position modulation UWB system subjected to white and colored Gaussian jitter. It is shown that colored jitter degrades BER performance much more than white jitter, and the extent of degradation increases as the jitter bandwidth decreases. Motivated by this result, we then propose a new jitter compensation scheme to improve the BER performance under colored jitters with small jitter bandwidth, in which each information-bearing data symbol is coupled with a pilot symbol. The proposed scheme attempts to track first the jitter for the current pilot symbol by making use of the pulse-template correlation function. This information is then used together with the known clock jitter bandwidth and jitter root-mean-square (RMS) value to detect the current data symbol according to the maximum likelihood criterion. Simulation results show that the algorithm is effective in improving the BER performance for colored jitters with small jitter bandwidth. Lei Huang received the B.Sc. degree from Xi'an Jiaotong University, China, in 1993, the M. Sc. degree from South China University of Technology in 1996, and the Ph.D. degree from Victoria University of Technology (VUT), Australia, in 2003, all in Electrical Engineering. From 1996 to 1999, he was a Lecturer at South China University of Technology. From March 2003 to December 2005, he was with National University of Singapore as a Research Fellow. Since January 2006, he has been working in Panasonic Singapore Laboratories as an R & D Engineer. His research interests focus on physical layer aspects on wireless communication systems, especially CDMA, ultrawideband and millimeter wave communications.     

基于协商对策的多平台目标跟踪冲突消解

以利用多平台对空中多机动目标跟踪为背景,针对各平台执行能力与跟踪精度不同所导致的任务分配与平台资源利用之间存在冲突的情况,研究了基于协商对策的多平台目标跟踪冲突消解方法。以提高机动目标跟踪精度为原则,在避免重复跟踪和目标遗漏的同时充分利用平台资源,通过比较各平台对不同目标的跟踪精度,根据具体态势优先或按顺序分配任务。基于Visual C++6.0对多平台多机动目标跟踪中采用协商对策实现冲突消解的方法进行了仿真,通过与随机任务分配时的跟踪精度比较,验证了该方法的有效性。