斜置式方形探针测量单晶断面电阻率分布mapping技术

介绍了一种应用斜置式方形探针测量单晶断面电阻率的测试方法,将Rymaszewski直线探针测试方法引入到方形探针测试,并对测试过程中产生的游移以及图像监控问题进行了讨论.应用此测试方法得到了75mm的全片电阻率分布的mapping图,测试结果表明该方法可以在测量区域明显减小的同时保证测量的精确性,是一种行之有效的测量方法.     

两种薄层电阻测试系统探针游移误差的对比分析

从理论上分析方形四探针和直线四探针薄层电阻测试方法中探针游移所造成的系统偏差,推导出计算游移偏差的公式,并作图展示探针游移后的电阻与理想值之比的分布情况,分析了两种四探针测试方法出现最大误差的情况。用方形四探针测试方法不仅比普通直线四探针测试方法所测量的微区小,而且方形四探针测量的游移偏差小于直线四探针测量所产生的偏差。经试验发现,实际测试过程中,方形四探针只要在合理压力范围内,探针游移完全在合理范围内,能够保证测试的准确性。     

四探针技术测量薄层电阻的原理及应用

对四探针技术测试薄层电阻的原理进行了综述,重点分析了常规直线四探针法、改进范德堡法和斜置式方形Rymaszewski法的测试原理,并应用斜置式Rymaszewski法研制成新型的四探针测试仪,利用该仪器对样品进行了微区(300μm×300μm)薄层电阻测量,做出了样品的电阻率等值线图,为提高晶锭的质量提供了重要参考.     

欧姆接触电阻率的精确测量方法

分析了一般测量接触电阻率的TLM模型以及“端电阻”修正模型的缺点,提出了一种新的接触电阻率的测试方法。此方法模型精确,常规测试条件下容易得到误差小于1%的相关测试量的值,使接触电阻率的测试误差小于5%。     

方形探针测量矩形薄片电阻率的一种新计算方法及讨论

本文应用Schwarz变换简化了边界条件,讨论了方形四探针测量单面及双面扩散的矩形半导体薄片电阻率的修正因子,给出了用雅可比椭圆函数表示的公式。结果还表明采用适当的样品形状及探针排列可以提高测量的精度。对于双面扩散样品,还存在一个最佳形状,即当a/d=1时,修正因子与样品大小无关。     

无测试图形薄层电阻测试仪及探针定位

研制出检测U L SI芯片的薄层电阻测试仪,可用于测试无图形样片电阻率的均匀性,用斜置的方形四探针法,经显微镜、摄像头及通信口接入计算机,从计算机显示器观察,用程序及伺服电机控制平台和探针移动,使探针处于规定的位置,实现自动调整、测试;对测试系统中的探针游移造成的定位误差进行分析,推导出探针游移产生误差的计算公式,绘制了理论及实测误差分布图;测出无图形10 0 m m样品电阻率,并绘制成等值线Mapping图.     

无测试图形薄层电阻测试仪及探针定位

研制出检测ULSI芯片的薄层电阻测试仪,可用于测试无图形样片电阻率的均匀性,用斜置的方形四探针法,经显微镜、摄像头及通信口接入计算机,从计算机显示器观察,用程序及伺服电机控制平台和探针移动,使探针处于规定的位置,实现自动调整、测试;对测试系统中的探针游移造成的定位误差进行分析,推导出探针游移产生误差的计算公式,绘制了理论及实测误差分布图;测出无图形100mm样品电阻率,并绘制成等值线Mapping图.     

图像识别在四探针测试技术中的应用

本文介绍了在斜置式方形探针测试系统中,如何应用图像识别技术来判定探针在微区的位置,进而控制步进电机,使探针自动定位成方形结构,从而保证测试的准确性,并对测试结构对测试结果的影响,进行了初步论述.     

四探针和EIT测试微区薄层电阻的研究与进展

论述了一种测试大型硅片电阻率均匀性的新方法——电阻抗成像技术（EIT）。给出了四探针的基本原理,指出EIT的基本思想来源于四探针技术。对EIT的基本原理和重建算法在理论上进行了描述．提出可将其应用于微区薄层电阻测试,并对EIT在大型硅片微区薄层电阻率均匀性测试技术上的系统应用做了进一步探索。     

双电测组合法测试半导体电阻率的研究

对双电测组合四探针法测试方块电阻(Rs)和体电阻率(ρ)进行了研究,从理论和实践上揭示三种组合模式的共同优点:测量结果与探针间距无关,可使用不等距探针头;具有自动修正边界影响的功能,不必寻找修正因子;不移动探针头即可得知均匀性.推导出用于体电阻率时的厚度函数.论述了Rs、ρ、大小样片及边界附近的测试原理,给出了Rs和ρ的计算公式.     

Experimental method and FE simulation model for evaluation of wafer probing parameters

Wafer probing technology is a critical testing technology that is used in the semiconductor manufacturing and packaging process. A well-designed probing system must enable low and stable contact resistance when each needle-like probe makes contact with the IC chip-bonding pad. Mechanical contact using excessive probe force causes over-sized scrub marks that may damage the die pad and sizably deform the probe tip. In this paper, an experimental setup of a single tungsten needle probe making contact with an Al pad was employed to investigate the relationships between the overdrive, contact force, and scrub mark length. A three-dimensional computational probing simulation model was developed for analyzing dynamic deformations of the contact phenomena during wafer testing. The mechanical tensile strength of the tungsten needle was tested with a micro-tester to examine the tensile stress-strain relationship. The elastoplastic behaviors of the probe and die were taken into account in the simulation model. The resultant scrub lengths from the simulation were verified against the experimental data. Additional critical data, such as data of the scrub mark sinking on the die surface and the maximum Von-Mises stress level location at the probe tips, can be predicted. The experimental and numerical methods presented here can be used as useful performance evaluation tools to support the choice of suitable probe geometry and wafer probe testing parameters.     

共面微波探针在片测试技术研究

本文描述了使用共面微波探针的半导体芯片在片测试技术.设计研制出的多种微波探针性能参数稳定,使用寿命在十万次以上,用于在片检测各种GaAs共面集成电路芯片.触头排列为GSG的微波探针,-3dB带宽及反射损耗分别为14GHz和小于-10dB.     

服务于IC产业的MEMS探卡

圆片级芯片测试在IC制造工艺中已经成为不可或缺的一部分,发挥着重要的作用,而测试探卡在圆片级芯片测试过程中起着关键的信号通路的作用。分析指出由于芯片管脚密度的不断增加以及在高频电路中应用的需要,传统的组装式探卡将不能适应未来的测试要求;和传统探卡的组装方法相比,MEMS技术显然更适应当今的IC技术。综述了针对MEMS探卡不同的应用前景所提出的多种技术方案,特别介绍了传感技术国家重点实验室为满足IC圆片级测试的要求,针对管脚线排布型待测器件的新型过孔互连式悬臂梁芯片和针对管脚面排布型待测器件的Ni探针阵列结构的设计和制造。     

晶圆针测技术的异常问题分析与研究

在晶圆探针测试当中,常会由于测试环境或是针测机台参数的改变,使得针痕不正常偏移并打出开窗区,造成测试时的误宰,因而造成公司的损失。文章将就晶圆针测中,由于温度变化所造成的不正常针痕偏移进行分析与研究。     

SAW器件晶片在线探测中的边缘效应

在声表面波器件的探测中．对于某些膜厚较厚，线条陡直度较好的品种，由于声信号在相邻芯片问指条的反射作用，使得其在不同位置的芯片探测结果出现差异，影响了对合格与否的判断，称为边缘效应。该文就这种边缘效应进行讨论和实验，提出用分离反射信号的方法进行修正．同时对该修正方法对测试结果的影响进行了讨论。     

Electron mobility enhancement using ultrathin pure Ge on Si substrate

We demonstrate enhancement of electron mobility in nMOSFET using an ultrathin pure Ge crystal channel layer directly grown on a bulk Si wafer. A thin Si crystal layer is also grown on top of a Ge crystal channel layer as a capping layer. Using the Si/Ge/Si structure, a maximum 2.2X enhancement in electron mobility is achieved while good gate dielectric properties and junction qualities of bulk Si devices are maintained.     

Hemisphere-shaped silicon crystal wafers obtained by plastic deformation and preparation of their solar cells

Hemisphere-shaped crystal wafers can be prepared by the plastic deformation of Si crystal wafers. To obtain hemispherical Si wafers, graphite convex and concave dies were used. A Si wafer was set between dies and pressed at high temperatures. The Si wafer was pressed by an overweight of 200 N at various temperatures. The deformation regions in which well-shaped (100) and (111) wafers can be obtained by plastic deformation were determined using parameters of thickness and temperature. In order to demonstrate that the shaped wafers are of sufficiently high quality to be used in the preparation of devices, solar cells were fabricated using the hemispherical Si wafers pressed at 1,120°C and 1,200°C. The conversion efficiency of the hemispherical solar cells is 8.5–11.5%. It was clarified from the conversion efficiency of solar cells that the quality of the shaped crystal wafers can be improved by a proper annealing process. Thus, the hemispherical shaped wafers are of high quality to be used in the preparation of devices.     

用于制备SOI材料的基于硅片键合和双层多孔硅剥离的薄外延硅膜转移技术

采用在阳极化反应时改变电流强度的办法 ,在高掺杂的 P型硅 (111)衬底上制备了具有不同多孔度的双层结构多孔硅层 .用超高真空电子束蒸发技术在多孔硅表面外延生长了一层高质量的单晶硅膜 .在室温下 ,该外延硅片同另一生长有热二氧化硅的硅片键合在一起 ,在随后的热处理过程中 ,键合对可在多孔硅处裂开 ,从而使外延的单晶硅膜转移到具有二氧化硅的衬底上以形成 SOI结构 .扫描电镜、剖面投射电镜、扩展电阻和霍尔测试表明 SOI样品具有较好的结构和电学性能     

High resistivity measurement of SiC wafers using different techniques

To establish fast, nondestructive, and inexpensive methods for resistivity measurements of SiC wafers, different resistivity-measurement techniques were tested for characterization of semi-insulating SiC wafers, namely, the four-point probe method with removable graphite contacts, the van der Pauw method with annealed metal and diffused contacts, the current-voltage (I-V) technique, and the contactless resistivity-measurement method. Comparison of different techniques is presented. The resistivity values of the semi-insulating SiC wafer measured using different techniques agree fairly well. As a result, application of removable graphite contacts is proposed for fast and nondestructive resistivity measurement of SiC wafers using the four-point probe method. High-temperature van der Pauw and room-temperature Hall characterization for the tested semi-insulating SiC wafer was also obtained and reported in this work.