Solution-Processed TIPS-Pentacene Organic Thin-Film-Transistor Circuits

We have fabricated solution-processed organic thin-film transistors (OTFTs) and circuits using triisopropylsilyl pentacene (TIPS-pentacene) as the active semiconductor material. Patterned bottom-gate solution-processed TIPS-pentacene OTFTs on glass substrates have mobility as large as 0.6 cm²/Vldrs and subthreshold slope as low as 0.4 V/dec. Seven-stage ring oscillators have oscillation frequency greater than 10 kHz and propagation delay of less than 8 mus per stage at a bias of 80 V. The 7- and 15-stage ring oscillators also operate with supply-voltage magnitude of less than 5 V.     

Soluble pentacene thin-film transistor using a high solvent and heat resistive polymeric dielectric with low-temperature processability and its long-term stability

Solution processable organic thin-film transistors (OTFTs) were fabricated using 6,13-bis(triisopropyl-silylethynyl) pentacene (TIPS-pentacene) and low-temperature processable polyimide gate dielectric. The TIPS-pentacene OTFT with the dielectric was found to have a field-effect mobility of 0.15 cm²/Vs, which is comparable to that of OTFT with an inorganic dielectric. The OTFTs with the polyimide dielectric did not show any significant performance degradation as time passed. A field-effect mobility of the OTFTs in 60 days was found to be almost identical to that of pristine OTFT. The combination of TIPS-pentacene and our polyimide gate dielectric can be one of the potential candidates for the fabrication of stable OTFTs for large-area flexible electronics.     

A 6,13-bis(Triisopropylsilylethynyl) Pentacene Thin-Film Transistor Using a Spun-On Inorganic Gate-Dielectric

We present the latest results of the use of soluble materials such as organic semiconductors (OSCs) or gate-dielectrics for simplified processing of organic thin-film transistors (OTFTs). In this paper, we described our fabrication of a solution-processed OTFT with 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) as the OSC and siloxane-based spin-on glass (SOG) as the inorganic gate-dielectric. Also, synthesized TIPS-pentacene and SOG were examined for use as the OSC and gate-dielectric in an OTFT. From electrical measurements, we obtained device performance characteristics such as charge carrier mobility, threshold voltage, current ON/OFF ratio, and subthreshold swing, which were 6.48 times 10^-3 cm²/V ldr s, -13 V, ~100, and 1.83 V/dec, respectively.     

Air-flow navigated crystal growth for TIPS pentacene-based organic thin-film transistors

6,13-Bis(triisopropylsilylethynyl)pentacene (TIPS pentacene) is a promising active channel material of organic thin-film transistors (OTFTs) due to its solubility, stability, and high mobility. However, the growth of TIPS pentacene crystals is intrinsically anisotropic and thus leads to significant variation in the performance of OTFTs. In this paper, air flow is utilized to effectively improve the TIPS pentacene crystal orientation and enhance performance consistency in OTFTs, and the resulted films are examined with optical microscopy, X-ray diffraction, and thin-film transistor measurements. Under air-flow navigation (AFN), TIPS pentacene drop-cast from toluene solution has been observed to form thin films with improved crystal orientation and increased areal coverage on substrates, which subsequently lead to a fourfold increase of average hole mobility and one order of magnitude enhancement in performance consistency defined by the ratio of average mobility to the standard deviation of the field-effect mobilities.     

Pentacene-Based Planar- and Vertical-Type Organic Thin-Film Transistor

Pentacene-based planar- and vertical-type organic thin-film transistors (OTFTs) are investigated in this paper. High operation voltages are observed for the planar-type OTFTs with top source/drain electrodes, which results from the limitations of channel length and low material mobility. With a reduced channel length, a LiF hole-injection enhancement layer, and a thin metal gate, the vertical-type pentacene OTFTs exhibit a low-voltage operation of less than 5 V and a compatible on/off ratio of larger than 10². The smaller current gain observed from the device under current modulation is attributed to the increase of base recombination current under the common-emitter mode.     

Design and modeling of self-aligned nano-imprinted sub-micrometer pentacene-based organic thin-film transistors

Sub-micrometer channel length (0.5 μm) organic thin-film transistors (OTFTs) are demonstrated using a process flow combining nano-imprint lithography (NIL) and self-alignment (SA). A dedicated test structure was designed and samples were fabricated on 4-in. plastic foils using a p-type sublimated small molecule (pentacene) as semiconductor. Field-effect mobilities, in saturation, between 0.1 and 1 cm²/Vs were obtained not only for the supermicron OTFTs but also for the submicron OTFTs. Those devices were used to select a model based on the “TFT Generic Charge Drift model” which works well for a broad range of channel lengths including the submicron OTFTs. We show that these OTFTs can be accurately modeled, thus giving access to complex circuit simulations and design.     

一种基于聚合物绝缘层的TIPS-pentacene晶体管性质研究

采用顶接触结构研究制备了以TIPS-pentacene为有源层、聚甲基丙烯酸甲酯(PMMA)为绝缘层的有机场效应晶体管(OFET),其中绝缘层采用溶液旋涂法制备,电极采用Au电极。通过原子力显微镜(AFM)和X射线衍射(XRD)技术对TIPS-pentacene在PMMA上的生长特性进行了详细分析,结果表明,器件获得了良好的电学特性,其场效应迁移率、阈值电压以及开关电流比分别为0.137 cm2/Vs、-19 V和9.74×104。对器件的稳定性也做了详细研究。     

Low-voltage p-channel, n-channel and ambipolar organic thin-film transistors based on an ultrathin inorganic/polymer hybrid gate dielectric layer

A key issue in research into organic thin-film transistors (OTFTs) is low-voltage operation. In this study, we fabricated low-voltage operating (below 3V) p-channel, n-channel and ambipolar OTFTs based on pentacene or/and C₆₀ as the active layers, respectively, with an ultrathin AlO_X/poly(methyl methacrylate co glycidyl methacrylate) (P(MMA–GMA)) hybrid layer as the gate dielectric. Benefited from the enhanced crystallinity of C₆₀ layer and greatly reduced density of electron trapping states at the interface of channel/dielectric due to the insertion of ultrathin pentacene layer between C₆₀ and P(MMA–GMA), high electron mobility can be achieved in present pentacene/C₆₀ heterostructure based ambipolar OTFTs. The effect of the thickness of pentacene layer and the deposition sequence of pentacene and C₆₀ on the device performance of OTFTs was studied. The highest electron mobility of 3.50 cm²/V s and hole mobility of 0.25 cm²/V s were achieved in the ambipolar OTFT with a pentacene (3.0 nm)/C₆₀ (30 nm) heterostructure.     

Degradation of all-inkjet-printed organic thin-film transistors with TIPS-pentacene under processes applied in textile manufacturing

Printed electronics represent an alternative solution for the manufacturing of low-temperature and large area flexible electronics. The use of inkjet printing is showing major advantages when compared to other established printing technologies such as gravure, screen or offset printing, allowing the reduction of manufacturing costs due to its efficient material usage and the direct-writing approach without requirement of any masks. However, several technological restrictions for printed electronics can hinder its application potential, e.g. the device stability under atmospheric or even more stringent conditions. Here, we study the influence of specific mechanical, chemical, and temperature treatments usually appearing in manufacturing processes for textiles on the electrical performance of all-inkjet-printed organic thin-film transistors (OTFTs). Therefore, OTFTs where manufactured with silver electrodes, a UV curable dielectric, and 6,13-bis(triisopropylsilylethynyl) pentance (TIPS-pentacene) as the active semiconductor layer. All the layers were deposited using inkjet printing. After electrical characterization of the printed OTFTs, a simple encapsulation method was applied followed by the degradation study allowing a comparison of the electrical performance of treated and not treated OTFTs. Industrial calendering, dyeing, washing and stentering were selected as typical textile processes and treatment methods for the printed OTFTs. It is shown that the all-inkjet-printed OTFTs fabricated in this work are functional after their submission to the textiles processes but with degradation in the electrical performance, exhibiting higher degradation in the OTFTs with shorter channel lengths (L = 10 μm).     

AMOLED panel driven by OTFTs on polyethylene fabric substrate

In this study, AMOLED display panel was fabricated on polyethylene (PET) fabric substrate. By considering flexibility of the PET fabric, organic thin film transistors (OTFTs), which used TIPS-pentacene as the active layer material, were adopted as the driving devices for the OLEDs. A standard pixel circuit was employed using two OTFTs and one capacitor and one OLED. The panel specifications were as follows; a pixel pitch of 1.5 × 1.5 mm, a resolution of 32 × 32, an aperture ratio of 22%, and a diagonal length of 2.7 inches. The large surface roughness of the PET fabric could be reduced down to 0.3 μm from the initial roughness of 10 μm by coating polyurethane and photo-acrylic with a two-step process. On the smoothened fabric, the OTFTs and OLEDs were integrated into the pixel array through the key processes, the self-patterning of the gate dielectric of the OTFTs and the patterning of the TIPS-pentacene layer. The mobility of two OTFTs was 0.23 and 0.34 cm²/V∙sec in the pixel array, respectively, and the luminance of the OLED was 64,459 cd/m². The AMOLED panel successfully operated to vary the luminance of each pixel according to the applied voltages.     

Temperature gradient controlled crystal growth from TIPS pentacene-poly(α-methyl styrene) blends for improving performance of organic thin film transistors

6,13-bis(triisopropylsilylethynyl) pentacene (TIPS pentacene) from simple drop casting typically forms crystals with random orientation and poor areal coverage, which leads to device-to-device performance variation of organic thin film transistors (OTFTs). Previously, a temperature gradient technique was developed to address these problems. However, this approach simultaneously introduced thermal cracks due to the thermally induced stress during crystallization. These thermal cracks accounted for a reduction of charge transport, thereby impacting the device performance of TIPS pentacene based OTFTs. In this work, an insulating polymer, poly(α-methyl styrene) (PαMS) was blended with TIPS pentacene to relieve the thermal stress and effectively prevent the generation of thermal cracks. The results demonstrate that the incorporation of PαMS polymer combined with the temperature gradient technique improves both the hole mobility and performance consistency of TIPS pentacene based OTFTs.     

Performance improvement of scaled-down top-contact OTFTs by two-step-deposition of pentacene

When scaling down to the channel length (L/sub c/) of 1.8 /spl mu/m using a membrane shadow mask, top-contact pentacene thin-film transistors (TFTs) show that grain size dependency on the anomalous leakage current becomes conspicuous as L/sub c/ is comparable to the grain size. For scaled-down OTFTs with large and small grain, the obvious difference of off-current in the depletion regime can be attributed to various reasons such as pentacene conductivity, parasitic resistance, locally ill-defined source/drain edge, and Au interdiffusion. To improve mobility as well as I/sub on//I/sub off/ ratio for scaled-down OTFTs, two-step-deposition (TSD) technique that enables us to control the channel conductivity in the depletion and accumulation regime as well as to improve the film continuity was proposed. To the best of our knowledge, the I/sub on//I/sub off/ ratio of 10/sup 7/ and the mobility of 0.20 cm/sup 2//V/spl middot/s for OTFTs with L/sub c/ of 1.8 /spl mu/m deposited by using the TSD technique was one of the best results in the literature.     

Teflon/SiO2 bilayer passivation for improving the electrical reliability of pentacene-based organic thin-film transistors

We demonstrate a bilayer passivation method using a Teflon and SiO₂ combination layer to improve the electrical reliability of pentacene-based organic thin-film transistors (OTFTs). The Teflon was deposited as a buffer layer using a thermal evaporator that exhibited good compatibility with the underlying pentacene channel layer, and can effectively protect the OTFTs from plasma damage during the SiO₂ deposition process, resulting in a negligible initial performance drop in OTFTs. Furthermore, because of the excellent moisture barrier ability of SiO₂, the OTFTs exhibited good time-dependent electrical performance, even after 168 h of aging in ambient air with 60–80% relative humidity.     

Quantitative Determination of Charge Transport Interface at Vertically Phase Separated Soluble Acene/Polymer Blends

Interfacial structure is critical for optimizing the electrical properties of organic field-effect transistors. In this study, the interfacial structures of 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene)/polymer blends are nondestructively determined by the complementary neutron and X-ray reflectivity. The TIPS-pentacene/deuterated poly(methylmethacrylate) (d-PMMA) blends exhibit a vertically phase-separated structure with a molecularly sharp interface (interfacial roughness ≈5 Å), whereas the TIPS-pentacene/d-polystyrene (d-PS) blend intermix near the interface. Ultrahigh molecular weight d-PMMA leads to the formation of surface-segregated hexagonal spherulites of TIPS-pentacene owing to the thermodynamic factors (e.g., surface/interface energy, polarity, and viscosity) of the blending materials. The well-developed hexagonal spherulites of TIPS-pentacene on molecularly sharp d-PMMA interface result in higher field-effect mobility as compared to the dendritic crystals from d-PS blends because of the higher perfectness, coverage, and interfacial roughness of the TIPS-pentacene crystals. The approach used in this study facilitates the understanding of the charge transport mechanism at the phase-separated interfaces in soluble acene/polymer blends.     

Full-swing pentacene organic inverter with enhancement-mode driver and depletion-mode load

A full-swing pentacene organic thin-film transistor (OTFT) inverter, which is composed of an enhancement-mode driver and a depletion-mode load, is proposed and confirmed at the discrete device level. The depletion-mode OTFT can be easily converted to the enhancement-mode by adding a thin PMMA layer between insulator and pentacene to the depletion-mode fabrication sequence. It is demonstrated that the proposed inverter shows a full-swing characteristic, large inverting gain and high noise margin with only two OTFTs.     

Structural and Electrostatic Complexity at a Pentacene/Insulator Interface

The properties of organic‐semiconductor/insulator (O/I) interfaces are critically important to the operation of organic thin‐film transistors (OTFTs) currently being developed for printed flexible electronics. Here we report striking observations of structural defects and correlated electrostatic‐potential variations at the interface between the benchmark organic semiconductor pentacene and a common insulator, silicon dioxide. Using an unconventional mode of lateral force microscopy, we generate high‐contrast images of the grain‐boundary (GB) network in the first pentacene monolayer. Concurrent imaging by Kelvin probe force microscopy reveals localized surface‐potential wells at the GBs, indicating that GBs will serve as charge‐carrier (hole) traps. Scanning probe microscopy and chemical etching also demonstrate that slightly thicker pentacene films have domains with high line‐dislocation densities. These domains produce significant changes in surface potential across the film. The correlation of structural and electrostatic complexity at O/I interfaces has important implications for understanding electrical transport in OTFTs and for defining strategies to improve device performance.     

Inserting a Mn-doped TiO2 layer for improving performance of pentacene organic thin-film transistors

Device performance of pentacene organic thin-film transistors (OTFTs) was significantly improved via inserting a Mn-doped TiO₂ layer between pentacene semiconductor and the source–drain electrodes. In comparison with the OTFTs with only-Au electrodes, the introduction of a thin Mn-doped TiO₂ layer leads to saturation current increasing from 31.9 μA to 0.22 mA, effective field-effect mobility improving from 0.24 to 1.13 cm²/V s, and threshold voltage downshifting from −11 to −2 V. These performance enhancements are ascribed to the significant reduction of contact resistance and smoothed surface of pentacene layer. This work may provide an effective approach to improve the performance of the pentacene based OTFTs by inserting a Mn-doped TiO₂ layer.     

Improved pentacene growth continuity for enhancing the performance of pentacene-based organic thin-film transistors

This study proposes an alternative planar bottom-contact (pBC) structure to enhance the electrical performance of pentacene-based organic thin-film transistors (OTFTs). This pBC structure uses a bilayer dielectric to control planarization with a precise etch depth and introduces a bilayer photoresist lift-off method to ensure that planarization produces an optimum flatness. Because of the improved growth continuity of pentacene near the edge of the source/drain electrodes, the contact resistance between the source/drain and the pentacene was reduced significantly, thereby enhancing the electrical performance of OTFTs. The mechanism for the enhanced performance was also verified by a physics-based numerical simulation.     

Simultaneous Modification of Bottom‐Contact Electrode and Dielectric Surfaces for Organic Thin‐Film Transistors Through Single‐Component Spin‐Cast Monolayers

An efficient process is developed by spin‐coating a single‐component, self‐assembled monolayer (SAM) to simultaneously modify the bottom‐contact electrode and dielectric surfaces of organic thin‐film transistors (OTFTs). This effi cient interface modifi cation is achieved using n‐alkyl phosphonic acid based SAMs to prime silver bottom‐contacts and hafnium oxide (HfO₂) dielectrics in low‐voltage OTFTs. Surface characterization using near edge X‐ray absorption fi ne structure (NEXAFS) spectroscopy, X‐ray photoelectron spectroscopy (XPS), attenuated total reflectance Fourier transform infrared (ATR‐FTIR) spectroscopy, atomic force microscopy (AFM), and spectroscopic ellipsometry suggest this process yields structurally well‐defi ned phosphonate SAMs on both metal and oxide surfaces. Rational selection of the alkyl length of the SAM leads to greatly enhanced performance for both n‐channel (C₆₀) and p‐channel (pentacene) based OTFTs. Specifi cally, SAMs of n‐octylphos‐phonic acid (OPA) provide both low‐contact resistance at the bottom‐contact electrodes and excellent interfacial properties for compact semiconductor grain growth with high carrier mobilities. OTFTs based on OPA modifi ed silver electrode/HfO₂ dielectric bottom‐contact structures can be operated using < 3V with low contact resistance (down to 700 Ohm‐cm), low subthreshold swing (as low as 75 mV dec^?1), high on/off current ratios of 107, and charge carrier mobilities as high as 4.6 and 0.8 cm² V^?1 s^?1, for C60 and pentacene, respectively. These results demonstrate that this is a simple and efficient process for improving the performance of bottom‐contact OTFTs.