基于单壁碳纳米管束的三维互连线设计与分析

Metallic carbon nanotubes(CNTs) have been proposed as a promising alternative to Cu interconnects in future integrated circuits(ICs) for their remarkable conductive, mechanical and thermal properties. Compact equivalent circuit models for single-walled carbon nanotube(SWCNT) bundles are described, and the performance of SWCNT bundle interconnects is evaluated and compared with traditional Cu interconnects at different interconnect levels for through-silicon-via-based three dimensional(3D) ICs. It is shown that at a local level, CNT interconnects exhibit lower signal delay and smaller optimal wire size. At intermediate and global levels, the delay improvement becomes more significant with technology scaling and increasing wire lengths. For 1 mm intermediate and 10 mm global level interconnects, the delay of SWCNT bundles is only 49.49% and 52.82% that of the Cu wires, respectively.     

Inter-CNT capacitance in mixed CNT bundle interconnects for VLSI circuits

This article presents a realistic inter-carbon nanotube (CNT) electrostatic coupling capacitance and tunnelling conductance model for a mixed CNT bundle. The change of potential across such a bundle necessitates the need to consider the inter-CNT capacitance in the equivalent circuit of CNT interconnects for very large scale integration circuits. The equivalent transmission line circuit model of a unit bundle containing one single-walled CNT (SWCNT) and one multi-walled CNT (MWCNT) has been shown. This new model is then used to calculate the delay induced by the inter-CNT capacitance and tunnelling conductance, which predicts the relative positioning of MW/SWCNTs in mixed CNT bundle.     

Circuit Modeling and Performance Analysis of Multi-Walled Carbon Nanotube Interconnects

Metallic carbon nanotubes (CNTs) have received much attention for their unique characteristics as a possible alternative to Cu interconnects in future ICs. Until this date, while almost all fabrication efforts have been directed toward multiwalled CNT (MWCNT) interconnects, there is a lack of MWCNT modeling work. This paper presents, for the first time, a detailed investigation of MWCNT-based interconnect performance. A compact equivalent circuit model of MWCNTs is presented for the first time, and the performance of MWCNT interconnects is evaluated and compared against traditional Cu interconnects, as well as Single-Walled CNT (SWCNT)-based interconnects, at different interconnect levels (local, intermediate, and global) for future technology nodes. It is shown that at the intermediate and global levels, MWCNT interconnects can achieve smaller signal delay than that of Cu interconnects, and the improvements become more significant with technology scaling and increasing wire lengths. At 1000- global or 500- intermediate level interconnects, the delay of MWCNT interconnects can reach as low as 15% of Cu interconnect delay. It is also shown that in order for SWCNT bundles to outperform MWCNT interconnects, dense and high metallic-fraction SWCNT bundles are necessary. On the other hand, since MWCNTs are easier to fabricate with less concern about the chirality and density control, they can be attractive for immediate use as horizontal wires in VLSI, including local, intermediate, and global level interconnects.     

Measurement of Subnanosecond Delay Through Multiwall Carbon-Nanotube Local Interconnects in a CMOS Integrated Circuit

Due to their excellent electrical properties and small size, metallic carbon nanotubes (CNTs) are promising materials for interconnect wires in future integrated circuits. Indeed, simulations have firmly established CNTs as strong contenders for replacing or complementing copper interconnects. In this paper, we analyze the performances of a prototype 0.25-$muhbox{m}$ CMOS digital integrated circuit with select horizontal multiwall CNT (MWCNT) interconnects. Some local interconnect wires of the prototype chip were implemented, during a post-CMOS assembly process, by single 14-$muhbox{m}$ -long metallic MWCNT with 30-nm diameter, representative of future requirements for local interconnects. We evaluate the merits and challenges of MWCNT interconnects in a realistic silicon integrated-circuit environment. We experimentally extract the subnanosecond delays of these wires to quantitatively benchmark their future potential for the first time. Furthermore, we compare our experimental results with an existing MWCNT interconnect model, as well as with the expected performances of scaled copper wires. Finally, we discuss the origin of the discrepancies between our experimental results and the modeling projections.      

Proposal and analysis of relative stability in mixed CNT bundle for sub-threshold interconnects

We introduce a Nyquist stability analysis of coupled mixed CNT bundle (MCB) for sub-threshold interconnects. In this analysis, the dependence of relative stability of sub-threshold MCBs with specific and probabilistic distribution of CNTs, on the geometry and probability of metallic CNTs, has been obtained. Using the proposed ABCD model and Nyquist stability criterion for sub-threshold MCBs, we show that, by increasing the diameter of each individual CNT and the length of MCB, the sub-threshold MCB interconnect system becomes more stable, while a densely packed MCB reduces the relative stability. Moreover, the crosstalk impact results in the greater stability of sub-threshold MCB system in comparison to a single interconnect. The crosstalk delay of MCB and composite Cu-MWCNT interconnects is also compared at various lengths. This is, so far, the first instance that such an analysis has been presented for coupled sub-threshold MCB interconnects.     

Inductance of mixed carbon nanotube bundles

The carbon nanotube (CNT) bundle is a promising candidate for next-generation interconnect/via applications. A realistic CNT bundle is a mixture of single-wall and multi-wall CNTs and its performance analysis needs to consider both kinds of CNTs. The inductances of the mixed CNT bundles are estimated, which are in agreement with the recent experimental results. Impacts of different parameters such as tube density, tube distribution, metallic tube ratio and bundle dimensions are discussed, providing an important guideline to design and fabricate a CNT bundle with a desirable inductance performance.     

On the Impact of Process Variations for Carbon Nanotube Bundles for VLSI Interconnect

Bundles of single-walled carbon nanotubes (SWCNTs) have been proposed as a possible replacement for on-chip copper interconnect due to their large conductivity and current-carrying capabilities. Given the manufacturing challenges associated with future nanotube-based interconnect solutions, determining the impact of process variations on this new technology relative to standard copper interconnect is vital for predicting the reliability of nanotube-based interconnect. In this paper, we investigate the impact of process variations on future interconnect solutions based on carbon nanotube bundles. Leveraging an equivalent RLC model for SWCNT bundle interconnect, we calculate the relative impact of ten potential sources of variation in SWCNT bundle interconnect on resistance, capacitance, inductance, and delay. We compare the relative impact of variation for SWCNT bundles and standard copper wires as process technology scales and find that SWCNT bundle interconnect will typically have larger overall three-sigma variations in delay. In order to achieve the same percentage variation in both SWCNT bundles and copper interconnect, the percentage variation in bundle dimensions must be reduced by up to 63% in 22-nm process technology     

Emerging interconnects: a state-of-the-art review and emerging solutions

Aluminium was a primary material for interconnection in integrated circuits (ICs) since their inception. Later, copper was introduced as interconnect material which has better metallic conductivity and resistance to electromigration. As the aggressive technology scaling continues, the copper resistivity increased because of size effects, which causes increase in delay, power dissipation and electromigration. The need to reduce the resistor-capacitor??????? delay, dynamic power utilisation and the crosstalk commotion is as of now the fundamental main impetus behind the presentation of new materials. The purpose of this paper is to do a survey of interconnect material used in IC from introduction of ICs to till date. This paper studies and reviews new materials available for interconnect application which are optical interconnects, carbon nanotube (CNT), graphene nanoribbons (GNRs) and silicon nanowires which are alternatives to copper. While doing a survey of interconnect material, it is found that multiwalled CNTs, multilayer GNR and mixed CNT bundles are promising candidates and are ultimate choice that can strongly address the problems faced by copper but on integration basis copper would last for coming years.     

High-Frequency Analysis of Carbon Nanotube Interconnects and Implications for On-Chip Inductor Design

This paper presents a rigorous investigation of high-frequency effects in carbon nanotube (CNT) interconnects and their implications for the design and performance analysis of high-quality on-chip inductors. A frequency-dependent impedance extraction method is developed for both single-walled CNT (SWCNT) and multiwalled CNT (MWCNT) bundle interconnects. The method is subsequently verified by comparing the results with those derived directly from the Maxwell's equations. Our analysis reveals for the first time that skin effect in CNT (particularly MWCNT) bundles is significantly reduced compared to that in conventional metal conductors, which makes them very attractive and promising material for high-frequency applications, including high-quality (Q) factor on-chip inductor design in high-performance RF/mixed-signal circuits. It is shown that such unique high-frequency properties of CNTs essentially arise due to their large momentum relaxation time (leading to their large kinetic inductance), which causes the skin depths to saturate with frequency and thereby limits resistance increase at high frequencies in a bundle structure. It is subsequently shown that CNT-based planar spiral inductors can achieve more than three times higher Q factor than their Cu-based counterparts without using any magnetic materials or Q factor enhancement techniques.     

Delay and crosstalk reliability issues in mixed MWCNT bundle interconnects

Multi-walled carbon nanotube (MWCNT) bundles have potentially provided attractive solution in nanoscale VLSI interconnects. In current fabrication process, it is not trivial to grow a densely packed bundle having MWCNTs with similar number of shells. A realistic nanotube bundle, in fact, is a mixed CNT bundle consisting of MWCNTs of different diameters. This research paper presents an analytical model of mixed CNT bundle wherein MWCNTs having different number of shells are densely packed. Two different types of MWCNT bundles are presented: (1) MB that contains MWCNTs with similar number of shells (i.e., uniform diameters) and (2) MMB wherein MWCNTs having different number of shells (i.e., non-uniform diameters) are mixed. Multi-conductor transmission line theory is used to present an equivalent single-conductor (ESC) model of different MB and MMB configurations. Using the ESC model, performance is analyzed to address the effect of propagation delay, crosstalk and power dissipation that explores the reliability of an interconnect wire. It is observed that using an MMB arrangement, the overall reduction in delay and crosstalk are 15.33% and 29.59%, respectively, compared to the MB for almost similar power dissipation.     

Synthesis of carbon nanotubes by catalytic chemical vapour deposition: A review on carbon sources,catalysts and substrates

Carbon nanotubes (CNTs) have been extensively studied during the past two decades and Catalytic Chemical Vapour Deposition (CCVD) technique has been untiredly employed by researchers to produce CNTs of various crystallographic configurations. In this paper the material aspects carbon sources, catalysts and substrates with regard to CCVD synthesis of carbon nanotubes are reviewed in light of latest developments and understandings in the field. The role of these materials in synthesis of CNTs is explained keeping the upto date literature in view. Latest research reports and their findings are presented with regard to effects of growth control aspects such as temperature, vapour pressure and catalyst concentration on CNT formation. Besides recent understandings with regard to preferential growth of CNTs are also discussed. From this literature review it is found that carbon diffusibility and carbon solubility of any catalyst are two important factors in determining CNT nucleation and growth. Moreover, addition of catalyst species to any transition metal catalyst can improve the catalyst performance and addition of water, air, alcohol etc. during CCVD process can increase the activity and lifetime of the catalyst besides enhances the production of CNTs.     

Evaluating the impact of resistance in carbon nanotube bundles for VLSI interconnect using diameter-dependent modeling techniques

Single-walled carbon nanotube (SWCNT) bundles have the potential to provide an attractive solution for the resistivity and electromigration problems faced by traditional copper interconnects. This paper discusses the modeling of nanotube bundle resistance for on-chip interconnect applications. Based on recent experimental results, the authors model the impact of nanotube diameter on contact and ohmic resistance, which has been largely ignored in previous bundle models. The results indicate that neglecting the diameter-dependent nature of ohmic and contact resistances can produce significant errors. Using the resistance model, it is shown that SWCNT bundles can provide up to one order of magnitude reduction in resistance when compared with traditional copper interconnects depending on bundle geometry and individual nanotube diameter. Furthermore, for local interconnect applications, an optimum nanotube diameter exists to minimize the resistance of the carbon nanotube bundle.     

Carbon nanotube electronics

We evaluate the potential of carbon nanotubes (CNTs) as the basis for a new nanoelectronic technology. After briefly reviewing the electronic structure and transport properties of CNTs, we discuss the fabrication of CNT field-effect transistors (CNTFETs) formed from individual single-walled nanotubes (SWCNTs), SWCNT bundles, or multiwalled (MW) CNTs. The performance characteristics of the CNTFETs are discussed and compared to those of corresponding silicon devices. We show that CNTFETs are very competitive with state-of-the-art conventional devices. We also discuss the switching mechanism of CNTFETs and show that it involves the modulation by the gate field of Schottky barriers at the metal-CNT junctions. This switching mechanism can account for the observed subthreshold and vertical scaling behavior of CNTFETs, as well as their sensitivity to atmospheric oxygen. The potential for integration of CNT devices is demonstrated by fabricating a logic gate along a single nanotube molecule. Finally, we discuss our efforts to grow CNTs locally and selectively, and a method is presented for growing oriented SWCNTs without the involvement of a metal catalyst.     

Compact Performance Models and Comparisons for Gigascale On-Chip Global Interconnect Technologies

The on-chip global interconnect with conventional Cu/low-k and delay-optimized repeater scheme faces great challenges in the nanometer regime owing to its severe performance degradation. This paper describes the analytical models and performance comparisons of novel interconnect technologies and circuit architectures to cope with the interconnect performance bottlenecks. Carbon nanotubes (CNTs) and optics-based interconnects exhibit promising physical properties for replacing the current Cu/low-k-based global interconnects. We quantify the performance of these novel interconnects and compare them with Cu/low-k wires for future high-performance integrated circuits. The foregoing trends are studied with technology node and bandwidth density in terms of latency and power dissipation. Optical wires have the lowest latency and power consumption, whereas a CNT bundle has a lower latency than Cu. The new circuit scheme, i.e., “capacitively driven low-swing interconnect (CDLSI),” has the potential to effect a significant energy saving and latency reduction. We present an accurate analytical optimization model for the CDLSI wire scheme. In addition, we quantify and compare the delay and energy expenditure for not only the different interconnect circuit schemes but also the various future technologies, such as Cu, CNT, and optics. We find that the CDLSI circuit scheme outperforms the conventional interconnects in latency and energy per bit for a lower bandwidth requirement, whereas these advantages degrade for higher bandwidth requirements. Finally, we explore the impact of the CNT bundle and the CDLSI on a via blockage factor. The CNT shows a significant reduction in via blockage, whereas the CDLSI does not help to alleviate it, although the CDLSI results in a reduced number of repeaters due to the differential signaling scheme.      

碳纳米管与外电路的连接技术进展

首先,介绍了碳纳米管电子器件应用中的关键工艺技术——碳纳米管与外电路的连接技术,回顾了碳纳米管与外电路装配的发展历程。从碳纳米管在电极间的随机连接到电场定位组装和原子力显微镜的可控操纵,描述了各种装配方法的特点。其次,讨论了碳纳米管与外电路连接的可靠性问题,并介绍了电子束、扫描探针显微镜和超声波等多种改善接触性能的焊接方法。最后,简单展望了碳纳米管与外电路连接的发展趋势,指出数目可控的碳纳米管组装技术和规模化的焊接工艺是今后研究工作的重点。     

Modeling, Analysis, and Design of Graphene Nano-Ribbon Interconnects

Graphene nanoribbons (GNRs) are considered as a prospective interconnect material. A comprehensive conductance and delay analysis of GNR interconnects is presented in this paper. Using a simple tight-binding model and the linear response Landauer formula, the conductance model of GNR is derived. Several GNR structures are examined, and the conductance among them and other interconnect materials [e.g., copper (Cu), tungsten (W), and carbon nanotubes (CNTs)] is compared. The impact of different model parameters (i.e., bandgap, mean free path, Fermi level, and edge specularity) on the conductance is discussed. Both global and local GNR interconnect delays are analyzed using an RLC equivalent circuit model. Intercalation doping for multilayer GNRs is proposed, and it is shown that in order to match (or better) the performance of Cu or CNT bundles at either the global or local level, multiple zigzag-edged GNR layers along with proper intercalation doping must be used and near-specular nanoribbon edge should be achieved. However, intercalation-doped multilayer zigzag GNRs can have better performance than that of W, implying possible application as local interconnects in some cases. Thus, this paper identifies the on-chip interconnect domains where GNRs can be employed and provides valuable insights into the process technology development for GNR interconnects.      

Chemical modification of carbon nanotube for improvement of field emission property

In the present work, chemical modification of carbon nanotube was proposed for improvement of field emission property. Multi-wall carbon nanotubes (MWCNTs) were grown vertically on silicon substrate using catalytic chemical vapor deposition. Tips of grown MWCNTs were chemically modified using oxygen plasma, nitric acid, and hydrofluoric acid. Surface state and morphology of the chemically modified CNTs were investigated. CNT tips were opened and defects working as trap sites were generated on the CNT surface by the chemical modification process leading to improvement of field emission property. We suggest that two main factors determining the field enhancement factor are geometric factor and surface state of the CNT tips.     

采用碳纳米管导电薄膜作为OLED的阳极

采用碳纳米管(CNT)替代ITO作为OLED阳极可以 解决ITO薄膜存在的可弯曲性能差,可靠性低等缺 点,使得柔性显示成为可能。本文采用混合型CNT导电薄膜作为阳极,探讨了CNT薄膜的制备 工艺、掺 杂方式及表面修饰等因素对绿光OLED性能的影响。实验结果表明,P型掺杂对CNT薄 膜的导电性能影响 有限;而PEDOT修饰层可以很好的提高CNT导电薄膜的平整度;此外,采用“十字交叉 ”的阳极形状有助于降低 阳极拐角处毛刺。通过优化器件各参数,制备的PET/CNTs/PEDOT/NPB/ALq₃/LiF/Al绿光OL ED发光效率达 到了195 cd/m²,结果表明采用混合型CNT作为OLED阳极是可行的。     

Impact of Morphology on Printed Contact Performance in Carbon Nanotube Thin‐Film Transistors

Silver nanoparticles (NPs) are the most widely used conductive material throughout the printed electronics space due to their high conductivity and low cost. However, when interfacing with other prominent printed materials, such as semiconducting carbon nanotubes (CNTs) in thin‐film transistors (TFTs), silver is suboptimal when compared to more expensive or less conductive materials. Consequently, there would be significant value to improving the interface of printed silver to CNT films. In this work, the impact of nanostructure morphology on the electrical properties of printed silver and nanotube junctions in CNT‐TFTs is investigated. Three distinct silver morphologies (NPs, nanoflakes – NFs, and nanowires – NWs) are explored with top‐ and bottom‐contact configurations for each. The NF morphology in a top‐contact configuration is found to yield the best electrical interface to CNTs, resulting in an average contact resistance of 1.2 MΩ ? µm. Beyond electrical performance, several trade‐offs in morphology selection are revealed, including print resolution and process temperature. While NF inks produce the best interfaces, NP inks produce the smallest features, and NW inks are compatible with low processing temperatures (<80 °C). These results outline the trade‐offs between silver contact morphologies in CNT‐TFTs and show that contact morphology selection can be tailored for specific applications.     

Crosstalk Prediction of Single- and Double-Walled Carbon-Nanotube (SWCNT/DWCNT) Bundle Interconnects

The crosstalk effects in single- and double-walled carbon-nanotube (SWCNT and DWCNT) bundle-interconnect architectures are investigated in this paper. Some modified equivalent-circuit models are proposed for both SWCNT and DWCNT bundles, where capacitive couplings between adjacent bundles are incorporated. These circuit models are further used to predict the performance of SWCNT and DWCNT bundle interconnects in comparison with the Cu wire counterpart at all interconnect levels for advanced future technology generations. It is found that, compared with the SWCNT bundle, the DWCNT bundle interconnect can lead to a reduction of crosstalk-induced time delay, which will be more significant with increasing bundle length, while the peak voltage of the crosstalk-induced glitch in SWCNT and DWCNT bundle interconnects is in the same order as that of Cu wires. Due to the improvement in time delay, it is numerically confirmed that the DWCNT bundle interconnect will be more suitable for the next generation of interconnect technology as compared with the SWCNT bundle counterpart.