硅光子中波分复用技术研究

介绍了硅光子互连中4种波分复用器及相关单片集成发射接收芯片,其中硅纳米线阵列波导光栅及刻蚀衍射光栅波分复用器单个芯片就可以成倍扩展通道数,非常适合大通道数密集波分复用,马赫-曾德尔结构及微环谐振型波分复用器芯片通道数增大时需要多个单元级联,波长准确性及间隔不易控制,比较适合通道数少的芯片应用。同时,给出了自主设计和制备的硅纳米线阵列波导光栅和刻蚀衍射光栅,通过采用阵列波导展宽方法,有效抑制了阵列波导的串扰,实现串扰小于-15 d B;通过在刻蚀衍射光栅反射面引入二维光子晶体反射镜,降低了刻蚀衍射光栅的反射损耗,损耗比普通刻蚀衍射光栅减小了3 d B。     

多通道薄膜铌酸锂阵列波导光栅研制

基于薄膜铌酸锂材料平台，通过开发金属掩膜与ICP刻蚀相结合的波导制备工艺，研制出了8通道且通道间隔400 GHz的阵列波导光栅，器件整体尺寸为1.28 mm×1.38 mm。测试结果表明，该阵列波导光栅的串扰小于-15 dB，通道非均匀性小于0.5 dB。该器件为薄膜铌酸锂基波分复用技术积累了研制经验，并有望推进多通道微波光子模块的小型化应用。     

光子晶体电光调制和粗波分复用集成器件研究

提出了一种用于电光调制和粗波分复用的片上集成器件。该集成器件的电光调制器模块和粗波分复用器模块都是由硅基光子晶体波导和L3型谐振腔组成,两个模块间采用硅基光子晶体波导连接。该器件根据等离子体色散效应,采用L3型谐振腔和PN结实现了对波长的调制;根据微腔与波导的直接耦合理论,采用L3型谐振腔结构实现了滤波。利用基于三维时域有限差分法(3D-FDTD)的Lumerical软件对其进行仿真分析,结果表明该集成器件在工作波长1530 nm和1550 nm下均可以先完成各自的电光调制再进行双通道波长的复用。该器件在工作波长1530 nm和1550 nm下的插入损耗分别为0.70 dB和0.95 dB,消光比分别为20.97 dB和22.05 dB,调制深度均为0.99,信道串扰分别为-29.05 dB和-27.59 dB,器件尺寸仅为17.83μm×17.3μm×0.22μm。该集成器件结构紧凑,易于集成,可应用于高速大容量波分复用光通信系统。     

正交读出方式体全息光栅通信波长衍射特性

为了寻求高质量和高密度的密集波分复用器件,采用了在双掺铟铁的铌酸锂晶体中透射式记录/正交式读出方案制作体全息光栅的方法,对体全息光栅衍射特性进行理论分析和实验验证。利用波长为532nm的激光记录尺寸比为1:1的体全息光栅,然后用中心波长为1550nm的红外通讯波长成功读出,取得了波长选择性为0.5nm的波长衍射特性数据。同时,利用2维耦合波理论的闭形式解析解得到了该体全息光栅衍射效率随波长的变化关系。结果表明,实验结果与理论预期相符合,这一方法对制作体全息光栅密集波分复用器件的实用化是有帮助的。     

新型5×5分束达曼光栅的设计与制作北大核心

基于理论设计了一种面内旋转对称的新型5×5分束达曼光栅,研究并优化了光栅制作中曝光、显影及深刻蚀等关键工艺参数。采用接触式曝光和感应耦合等离子体（ICP）刻蚀技术,在石英基底上制作出达曼光栅结构。实验中通过优化石英基底上接触式曝光时间和显影时间,较好控制了曝光图形失真;进一步通过控制ICP刻蚀工艺参数,获得了刻蚀深度为（750±10）nm的石英衬底,实现了达曼光栅器件的制备。通过衍射光学特性评测得到了理论设计的零级衍射场均匀分布的5×5点阵,总的衍射效率达到53%,不均匀性仅为0.19%。实验证明了理论设计与工艺技术的可靠性,为达曼光栅器件的集成光学系统应用奠定基础。     

正交读出方式体全息光栅通信波长衍射特性

为了寻求高质量和高密度的密集波分复用器件,采用了在双掺铟铁的铌酸锂晶体中透射式记录/正交式读出方案制作体全息光栅的方法,对体全息光栅衍射特性进行理论分析和实验验证.利用波长为532nm的激光记录尺寸比为1:1的体全息光栅,然后用中心波长为1550nm的红外通讯波长成功读出,取得了波长选择性为0.5nm的波长衍射特性数据.同时,利用2维耦合波理论的闭形式解析解得到了该体全息光栅衍射效率随波长的变化关系.结果表明,实验结果与理论预期相符合,这一方法对制作体全息光栅密集波分复用器件的实用化是有帮助的.     

利用常规工艺提高光子晶体GaN LED的出光效率

计算了GaN二维光子晶体的能带结构,并利用常规工艺在国内首次制备出了GaN基二维平板结构的光子晶体蓝光LED。经过器件测试表明,与没有制作光子晶体的器件相比,光子晶体使器件的有效出光效率达到了原来的1.5倍以上。另外,还对感应耦合等离子体刻蚀(ICP)的制备光子晶体LED的刻蚀工艺进行了分析。     

InGaAsP／InP单片集成波长解复用器件

报道了基于二维凹面光栅的单片集成波长解复用器件，器件刻蚀在ＩｎＧａＡｓＰ／ＩｎＰ平板波导上，通过凹面光栅的色散作用实现不同波长光的分离，光的输入输出耦合由波阵列来完成，器件的工作波长在１．５μｍ附近，通道间隔约４．３ｎｍ。本文给出了器件的设计方法，制作工艺和初步测试结果。     

结构紧凑的高均匀性硅波导阵列波导光栅

基于绝缘体上硅材料平台，设计并制作了一种结构紧凑的高均匀性硅波导阵列波导光栅，其拥有8个输出通道并且通道间隔为200 GHz。分析了绝缘体上硅材料平台中硅波导的弯曲半径对弯曲损耗和有效折射率的影响。测试结果表明，该器件的插入损耗为19.6 dB，串扰为-15 dB，非均匀性为0.87 dB,3 dB带宽为1.06 nm，结构尺寸仅为294μm×190μm。芯片的制作工艺与互补金属氧化物半导体工艺兼容，这使得阵列波导光栅的大批量、低成本生产成为可能，对集成波分复用网络的发展具有重要的意义。     

刻蚀衍射光栅像差特性分析

对作为波分复用关键器件之一的刻蚀衍射光栅(EDG)的像差特性提出了一种简单方便的计算方法,分析了像差对刻蚀衍射光栅频谱响应的影响.理论推导了基于基尔霍夫衍射、角谱衍射以及快速傅里叶变换等方法.最终证明彗差会造成谱形失称,明显降低耦合效率;而球差则会明显地增加串扰.并指出当像差存在时通过输出端加ta per结构,并不能显著改善器件的串扰特性.     

Four-channel wavelength division multiplexers and bandpass filtersbased on elliptical Bragg reflectors

Four-channel multiplexers and four-wavelength bandpass filters based on elliptical Bragg reflectors (EBRs) are discussed. The channel spacing is 50 Å near 1.56 μm. The EBRs are narrowband elliptical mirrors that can refocus light from an input waveguide to any one of a number of output waveguides. Spectrally, they perform similarly to Bragg reflectors. The devices were fabricated on silicon using silica-based waveguide technology. The elliptical gratings with 0.53-μm periods were patterned using deep UV spatial frequency doubling photolithography. Multiplexers with single filtering and double filtering were demonstrated. With single filtering, the fiber-to-fiber insertion loss was 3.0±0.5 dB, and the crosstalk was -20 dB; with double filtering, the insertion loss was 4.0±0.5 dB, and the crosstalk was -30 dB. About 2 dB of this loss was due to coupling between the fibers and the waveguide. The additive loss associated with the EBR, including propagation, Bragg reflection, and coupling between input and output waveguides, was about 1 dB     

Integrated folding 4/spl times/4 optical matrix switch with total internal reflection mirrors on SOI by anisotropic chemical etching

A folding rearrangeable nonblocking 4/spl times/4 optical matrix switch was designed and fabricated on silicon-on-insulator wafer. To compress chip size, switch elements (SEs) were interconnected by total internal reflection (TIR) mirrors instead of conventional S-bends. For obtaining smooth interfaces, potassium hydroxide anisotropic chemical etching of silicon was utilized to make the matrix switch for the first time. The device has a compact size of 20/spl times/1.6 mm/sup 2/ and a fast response of 7.5 /spl mu/s. The power consumption of each 2/spl times/2 SE and the average excess loss per mirror were 145 mW and -1.1 dB, respectively. Low path dependence of /spl plusmn/0.7 dB in total excess loss was obtained because of the symmetry of propagation paths in this novel matrix switch.     

A W-Band Air-Cavity Filter Integrated on a Thin-Film Substrate

In this letter, a W-band air-cavity filter has been developed on a thin-film substrate using a lossy silicon substrate as a base plate, which is suitable for a mm-wave system-on-package. The lossy silicon suppresses a parasitic substrate mode excited in a thin-film substrate, while a coupling loss between a transmission line and a resonator is minimized by etching the backside of the lossy silicon substrate underneath the coupling area. In the backside etching process, 70 mum of silicon was left for mechanical support of the thin-film substrate. The resonator was fabricated using a low-cost silicon micromachining technique and was flip-chip integrated on a thin-film substrate. The fabricated air-cavity resonator showed an unloaded Q of 851 at a resonant frequency of 94.18 GHz. Improvement in the coupling loss by the backside etching process was verified with measurement results. The fabricated filter exhibited an insertion loss of 1.75 dB and a return loss better than 14.5 dB with a 1.3% 3 dB fractional bandwidth at a center frequency of 93.8 GHz.     

MEMS THz滤波器的制作工艺

基于MEMS技术制作了太赫兹(THz)滤波器样品,研究了制作滤波器的工艺流程方案,其关键工艺技术包括硅深槽刻蚀技术、深槽结构的表面金属化技术、阳极键合和金-硅共晶键合技术。采用4μm的热氧化硅层作刻蚀掩膜,成功完成了800μm的深槽硅干法刻蚀;采用基片倾斜放置、多次离子束溅射和电镀加厚的方法完成了深槽结构的表面金属化,内部金属层厚度为3~5μm;用硅-玻璃阳极键合技术和金-硅共晶键合技术实现了三层结构、四面封闭的波导滤波器样品加工。测试结果表明,研制的滤波器样品中心频率138GHz,带宽15GHz,插损小于3dB。     

Optical demultiplexer using a silicon echelette grating

An echelette grating is fabricated on a silicon surface by anisotropic etching. A five channel demultiplexer using this grating for a wavelength-division-multiplexing system is developed in the 0.8-μm wavelength region. The wavelength spacings are 250 Å. This system's insertion loss for five channels is 1.4, 1.1, 1.1, 1.1, and 1.2 dB, respectively, and crosstalk levels are <-30 dB.     

硅基片上刻蚀衍射光栅及其平坦化设计

刻蚀衍射光栅（EDG）作为实现波分复用功能的关键器件,对于片上光互连的实现至关重要。为了实现1310nm波段通道间隔为20nm的硅基EDG,采用了基尔霍夫标量衍射理论仿真方法进行理论设计和仿真验证,通过在闪耀光栅反射面引入布喇格反射光栅来提高反射效率、降低器件插入损耗,并在入射波导处引入多模干涉耦合器以实现通道频谱平坦化设计。结果表明,闪耀光栅反射面的反射效率由35%提高到了85%,1dB带宽达到12nm。这对于提高系统稳定性、增大传输距离和容量、降低系统成本具有显著作用,能够满足光互连系统的实际应用需求。     

A Novel 4$, times ,$4 Optical Switch Using an Anisotropically Etched Micromirror Array and a Bistable Mini-Actuator Array

This letter presents a novel approach to realize a 4 times 4 optical switch. The optical switch consists of a micromachined silicon micromirror array and a bistable mini-actuator array. The micromirror array, which comprises vertical mirrors, cantilevers, and trenches, can be monolithically fabricated by a simple anisotropic silicon etching process in high precision and high yield. The mini-actuator array consists of 16 commercially available bistable actuators integrated with L-shape arms. The advantages of this approach include high precision, easy alignment, high fabrication yield, and low cost. Because of bistable actuation, the power consumption is very low and thus the temperature elevation of a working device is less than 0.3 K. The measured insertion losses of the four channels are between - 1.6 and - 2.3 dB. The measured crosstalk is less than -60 dB, and the measured switching time is about 13 ms.     

用于单片集成的InP阵列波导光栅设计和制备

InP 阵列波导光栅(AWG)是InP 基单片多波长转换器中的重要单元。采用深脊型波导结构,设计了一种10通道、通道间隔200GHZ(1.6nm)的偏振无关型InP基阵列波导光栅。采用外延技术、光刻、感应耦合等离子体刻蚀技术等在实验室制造出了这种AWG。经过测试,插入损耗约为-8dB,串扰小于-17dB,中心通道和旁边通道的通道均匀性基本上在3dB左右。     

Characterization and attenuation mechanism of CMOS-compatible micromachined edge-suspended coplanar waveguides on low-resistivity silicon substrate

This paper presents detailed characterization of a category of edge-suspended coplanar waveguides that were fabricated on low-resistivity silicon substrates using improved CMOS-compatible micromachining techniques. The edge-suspended structure is proposed to provide reduced substrate loss and strong mechanical support at the same time. It is revealed that, at radio or microwave frequencies, the electromagnetic waves are highly concentrated along the edges of the signal line. Removing the silicon underneath the edges of the signal line, along with the silicon between the signal and ground lines, can effectively reduce the substrate coupling and loss. The edge-suspended structure has been implemented by a combination of deep reactive ion etching and anisotropic wet etching. Compared to the conventional silicon-based coplanar waveguides, which show an insertion loss of 2.5dB/mm, the loss of edge-suspended coplanar waveguides with the same dimensions is reduced to as low as 0.5 dB/mm and a much reduced attenuation per wavelength (dB//spl lambda//sub g/) at 39 GHz. Most importantly, the edge-suspended coplanar waveguides feature strong mechanical support provided by the silicon remaining underneath the center of the signal line. The performance of the coplanar waveguides is evaluated by high-frequency measurement and full-wave electromagnetic (EM) simulation. In addition, the resistance, inductance, conductance, capacitance (RLGC) line parameters and the propagation constant of the coplanar waveguides (CPWs) were extracted and analyzed.     

A 45-channel 100 GHz AWG based on Si nanowire waveguides

A 45-channel 100 GHz arrayed waveguide grating (AWG) based on Si nanowire waveguides is designed, simulated and fabricated. Transfer function method is used in the spectrum simulation. The simulated results show that the central wavelength and channel spacing are 1 562.1 nm and 0.8 nm, respectively, which are in accord with the designed values, and the crosstalk is about ?23 dB. The device is fabricated on silicon-on-insulator (SOI) substrate by deep ultraviolet lithography (DUV) and inductively coupled plasma (ICP) etching technologies. The 45-channel 100 GHz AWG exhibits insertion loss of 6.5 dB and crosstalk of ?8 dB. This work has been supported by the National High Technology Research and Development Program of China (No.2015AA016902), and the National Natural Science Foundation of China (Nos.61435013 and 61405188). E-mail:zhangjiashun@semi.ac.cn