使用VCO实现变容二极管直接调频

介绍了一种使用VCO实现调频的锁相环电路并给出了关键技术,变容二极管直接调频和锁相,环路滤波器的设计及实验结果。该电路不仅具有低相位噪声、高稳定载波、很小的非线性失真,而且具有理想的音频调制频响。     

变容二极管倍频器

在高频电路中,变容管能产生丰富的谐波和具有高的效率,被越来越广泛地用于调频振荡、参量倍频、参量混频、参量放大和电调谐等电路中。本文只讨论变容二极管倍频器。一、变容管倍频原理变容二极管是一种非线性电容元件,它的PN结势垒电容能够灵敏地随反向偏压的改变而变化。当所加反向偏压较低时,变容二极管的等效电容就大。当所加反向偏压较高时,变容管的等效电容就小。其电容     

压控振荡器的计算机辅助设计

本文从准正弦的方法导出了变容二极管调谐的耿氏二极管压控振荡器的电路方程。对非线性元件作了专门的处理,得到了一个通用的计算机程序,这个程序可以计算小信号和大信号的静态调制特性,也可以计算动态特性和各参量对过渡过程的影响。     

基于TRL的3mm波段变容二极管对建模方法

本文在商用变容二极管的简化电路模型基础上,对非线性肖特基结和周围的无源结构进行了基于石英介质的TRL去嵌入建模分析,在考虑二极管无源区和封装环境各种寄生参量情况下,建立了精确的3mm波段二极管对电路模型.采用TRL算法,通过拟合初始二极管S参数曲线和TRL测试参数确定芯片电路模型中各集总参数元件数值.二极管对在片各项测试结果和基于改进的电路模型仿真结果相吻合.该二极管对电路模型建模方法可应用于毫米波亚毫米波混频倍频电路的准确分析与设计.     

《固态倍频》

一、主要内容:全书共分八章。第一至三章分别对非线性电阻性倍频器、变容二极管倍频器以及阶跃恢复二极管倍频器进行了理论分析;第四章讨论了各种倍频器的激励、偏置电路原理,以及集总参数和分布参数网络及其计算公式,并列出了几种典型滤波电路;第五章讨论了对倍频器相位噪声影响较大的调幅—调相变换特性和静态测试方法,并分析了突变结变容二极管的滞后效应及影响它的因素;第六至八章介绍了各种倍频器的设计原理及它们的主要性能参数、结构特点和测试。     

复合管是二极管的发展方向

本文介绍了几种新型复合二极管,包括变容二极管、开关二极管、二极管阵列、阻尼二极管、调制二极管和肖特基二极管等。     

一种无需振荡器的数字频率抖动电路及其应用

为了解决滞环控制模式开关电源中无振荡器电路,从而无法使用现有频率抖动方式降低EMI和现有频率抖动电路调制方式单一、移植性差的问题,本文提出了一种新型的数字频率抖动电路,该电路结构简单,调制方式多样,可移植性好。本设计采用1μm 40V CMOS工艺进行仿真验证,Hspice仿真结果表明该数字频率抖动电路有效地降低了系统的EMI。     

变容管调频技术及电路工作原理分析

本文叙述了变容二极管调频原理及调频锁相环路工作原理，并对ＴＦ７０５０调频发射机调制单元电路工作原理进行了分析。     

非线性电容器的电容特性公式

本文通过建立纯电容的非线性电路的基本方程,得到了非线性电容器的电容特性公式,并由此导出变容二极管的特性方程,验证了该公式的正确性。     

一种简易微波VCO的设计*

描述了一种高性能简易微波VCO器件的设计和实验。该器件基于负阻原理设计,利用微波FET和变容二极管等分立元件制作,具有高性价比的特点。设计过程中利用ADS软件进行电路的匹配和优化,通过合适的外电路设计对变容二极管VCO的调频线性度进行改善,同时,降低了VCO的相位噪声。实际电路的测试结果表明,当该VCO的中心频率为4.3GHz时,其调谐范围大于200MHz,输出功率大于5.2dBm,相位噪声优于-112dBc/Hz@1MHz和-83dBc/Hz@100kHz。     

An Analysis of Frequency Modulation Circuit Using p-n Junction Varactors

Simple circuits performing oscillation-frequency modulation functions using one active device and p-n junction type varactors are studied. The performance of the common circuit is analyzed. Equations are derived to determine signal-to-frequency deviation, transducer gain, frequency deviation, input impedance, distortion, maximum signal, noise and signal sensitivity, dynamic range, and maximum resolution. The upper or lower bounds of these quantities are given as functions of the varactor parameters and circuit constants.     

VCO phase-noise improvement by gate-finger configuration of 0.13-/spl mu/m CMOS transistors

Using a standard logic process, 0.13-/spl mu/m RF CMOS devices with multifinger gate structure have been fabricated. The flicker noise and minimum noise figure characteristics have been investigated with different gate layout splits, where the device parasitic resistance is the determining factor in this issue. The stripe-shaped gate configuration demonstrates better noise performance, due to the reduction of device gate resistance. In addition, the MOS varactors designed with different gate layouts were used in a 5.2-GHz voltage-controlled oscillator (VCO) design, where the VCO with the stripe-shaped (2 /spl mu/m /spl times/ 36 fingers) gate varactor improved about 6 dB in phase-noise performance at 100-kHz offset frequency than that of square-shaped (8 /spl mu/m /spl times/ 9 fingers) gate varactor.     

Methods for extending resonance frequency tuning ranges of frequency-selective surfaces using varactors

Methods for tuning resonance frequencies of elements of frequency-selective surfaces with the help of varactors are considered. The varactors are placed both in breaks of the conductor inside elements and in gaps between elements. Results of the approximate calculation and measurement of resonance frequencies of elements of frequency-selective surfaces of various shapes (butterfly, loop, and snake) with different-type varactors are presented. The measurement is based on the waveguide method. It is shown that, when varactors are placed in an element, the maximum relative resonance frequency change (37%) is reached with an element having a large self-capacitance (butterfly shape) and a small-capacitance varactor (MA46H120). The efficiency of the method for extending the resonance frequency tuning range of the element by means of the inductive shunting of the varactor circuit is estimated.     

A varactor configuration minimizing the amplitude-to-phase noise conversion in VCOs

Amplitude-to-phase-noise conversion due to varactors can severely limit the close-in phase noise performance in LC-tuned oscillators. This work proposes a rigorous analysis of this phenomenon, which highlights the fundamental limitations of single-ended tuned and differentially tuned diode varactor configurations. The back-to-back varactor topology is identified as a suitable solution to linearize the tank capacitance. The amplitude to phase noise conversion is greatly attenuated and the 1/f/sup 3/ phase noise is drastically reduced, without impairing the achievable tuning range. These results are validated through circuit simulations in an existing 0.35-/spl mu/m CMOS technology.     

A novel 2.95-3.65 GHz CMOS LC-VCO using tuning curve compensation

This paper presents a new CMOS LC-VCO with a 2.95-3.65 GHz tuning range. The large tuning range is achieved by tuning curve compensation using a novel varactor configuration, which is mainly composed of four accumulation-mode MOS varactors (A-MOS) and two bias voltages. The proposed varactor has the advantages of optimizing quality factor and tuning range simultaneously, linearizing the effective capacitance and thus greatly reducing the amplitude-to-phase modulation (AM-PM) conversion. The circuit is validated by simulations and fab-ricated in a standard 0.18 μm 1P6M CMOS process. Measured phase noise is lower than -91 dBc at 100 kHz offset from a 3.15 GHz carrier while measured tuning range is 21.5% as the control voltage varies from 0 to 1.8 V. The VCO including buffers consumes 2.8 mA current from a 1.8 V supply.     

Progress of a tunable active bandpass filter

A review of a tunable active bandpass filter developed in our research group is given here. Presented first is the basic structure of an end-coupled microstrip-line bandpass filter. Next discussed is the concept of using coupled negative resistance to compensate the loss of tank circuit. Then, the method of using varactor diode or mesfet varactor to tune the center frequency of the passband is discussed. The capability of optical-control of mesfet varactor and the concept of using mesfets as three-terminal varactors are also discussed.     

MOS varactors with n- and p-type gates and their influence on an LC-VCO in digital CMOS

The influence of the gate doping type of the MOS varactor on frequency tuning, phase noise, and frequency sensitivity to supply-voltage variations of a fully integrated inductance-capacitance voltage-controlled oscillator (LC-VCO) is presented. Three varactors in multifinger layout with shallow trench isolation (STI) are compared. The polysilicon gate is either entirely n- or p-doped or the fingers have alternating n and p doping. Differences in capacitance and quality factor are shown. Two identical VCOs with the varactors having n gates or np gates are realized. Homogenous doping increases the VCO tuning range to 1.31 GHz (/spl plusmn/20%) in comparison to 1.06 GHz (/spl plusmn/15%) obtained by mixed doping. However, mixed doping has the advantages of more linear VCO frequency tuning, lower close-in phase noise, and reduced maximum sensitivity to variations in supply voltage. Several varactor parameters are introduced. They allow prediction of the influence of varactors on the performance of a given VCO. With a current consumption of only 1 mA from a supply voltage of 1.5 V, both VCOs show a phase noise of -115 dBc/Hz at 1-MHz offset from a 4-GHz carrier and a VCO figure of merit of -185.3 dBc/Hz.     

A low-phase-noise LC-VCO with an enhanced-Q varactor for use in a high-sensitivity GNSS receiver

An LC-VCO with an enhanced quality factor(Q) varactor for use in a high-sensitivity GNSS receiver is presented.An enhanced A-MOS varactor is composed of two accumulation-mode MOS(A-MOS) varactors and two bias voltages,which show the improved Q and linearization capacitance-voltage(C-V) curve.The VCO gain(K_(vco)) is compensated by a digital switched varactors array(DSVA) over entire sub-bands.Based on the characteristics of an A-MOS,the varactor in a DSVA is a high Q fixed capacitor as it is switched off,and a moderate Q tuning varactor when it is switched on,which keeps the maximal Q for the LC-tank.The proposed circuit is fabricated in a 0.18μm 1P6M CMOS process.The measured phase noise is better than -122 dBc/Hz at a 1 MHz offset while the measured tuning range is 58.2%and the variation of K_(VCO) is close to±21%over the whole of the sub-bands and the effective range of the control voltage.The proposed VCO dissipates less than 5.4 mW over the whole operating range from a 1.8 V supply.     

Linearization of oscillation frequency for integrated LC-VCO with inversion-mode varactor

Metal-oxide semiconductor (MOS) varactors are widely used in voltage-controlled oscillators (VCOs) due to the need for a tunable capacitance. Two types of varactors that have been integrated on-chip include the inversion-mode and accumulation-mode types. The inversion-mode varactor offers immunity to latch-up, but suffers from a non-linear C(V) characteristic which directly leads to a nonlinear oscillation frequency tuning curve. This paper proposes an oscillation frequency linearization technique for LC-VCO with an inversion-mode varactor. The linearity of the frequency tuning curve is improved by linearization of C(V) characteristics of the inversion-mode varactor. A new varactor configuration consisting of varactor units and resistor divider network is proposed. The single-switch integrated LC-VCO with the proposed varactor configuration is fabricated in TSMC 0.18 μm CMOS technology. The improvement of linearity of the frequency tuning curve has been verified using mathematical models and measurement results.     

A calibration-less low error two-point modulation transmitter for 802.15.4 application

A low power phase locked loop (PLL) based transmitter for wireless sensor application is presented in this paper. The transmitter adopts two-point modulation architecture in high-pass and low-pass paths of PLL; it modulates the divide ratio through sigma-delta modulator and voltage controlled oscillator (VCO) frequency tuning port simultaneously. An interleave-biased varactor pair is used to linearize the frequency tuning curve of the VCO. Besides, to achieve the desired frequency deviation of 500 kHz, we use a capacitance desensitization technique through combined parallel and serial capacitances with tuning varactors. This topology does not need the minimum size varactor, which is sensitive to process variation and mismatch. Implemented in standard 0.18-μm CMOS process, the transmitter achieves a 5.2 % FSK error for 2 Mbps data rate without using any auto-calibration circuit, consuming 7.8 mW power. Loop filter and crystal are the only off-chip components.