放大器的相位噪声与噪声系数关系式理论推导

介绍了二端口器件放大器的噪声对相位噪声的影响,并从理论上对相位噪声和噪声系数之间的关系式进行了推导。     

光纤放大器热效应引起的相位噪声理论分析

光纤放大器相位噪声的探测和校正是光纤激光器阵列相干合成的关键技术，热效应是引起光纤放大器相位噪声的主要来源。理论分析了泵浦光开启到稳态过程中光纤放大器掺杂光纤的温度变化，以及对应的光纤放大器相位变化。通过数值计算发现，泵浦光在开启后，光纤放大器的掺杂光纤温度迅速升高，相位变化剧烈，在约10 s后达到稳态，此后泵浦光的能量不稳定。这表明，泵浦光的能量不稳定是引起光纤放大器相位噪声的最主要因素，通过稳定泵浦光电流可以降低光纤放大器的相位噪声。     

放大器的相位噪声与噪声系数关系式理论推导

介绍了二端口器件放大器的噪声对相位噪声的影响,并从理论上对相位噪声和噪声系数之间的关系式进行了推导。     

低噪声集成压控振荡器噪声性能分析

提出了一种低相位噪声时基核心电路的压控振荡器的设计方法。通过对采用由普通差分放大器单元和容性耦合差分放大器单元构成的环行振荡器的噪声分析得出,由容性耦合差分放大器单元构成的环行振荡器,因其带通特性和负阻特性而具有较好的抗噪声能力,可用于对频率稳定度有较高要求的ＶＣＯ等电路中。     

低噪声集成压控振荡器声性能分析

提出了一种低相位噪声时基核心电路的压控振荡器的设计方法。通过对采用由普通差分放大器单元和容性耦差分放大器单元构成的环行振荡器的噪声分析 ，由容性耦合差分放大器单元构成的环行振荡器，因其带通特性和负阻特性而具有较好的噪声能力，可用于对频率稳定度有较高要求的ＶＣＯ等电路中。     

锁相放大器对微弱信号的检测研究

通过Mulitisim仿真软件,实现对锁相放大器的设计,检测出含噪声中的微弱信号。本系统是基于锁相放大器的微弱信号检测电路,用来检测在强噪声背景下已知频率的微弱正弦波信号的幅度值及相位。     

光纤参量放大器技术及其最新进展

介绍和论述了一种非常有实用前景的基于光纤非线性效应的光参量放大器(OPA)及其最新技术进展．最新发展揭示了它的很多技术特性优于传统的掺铒光纤放大器(EDFA)、半导体光放大器(SOA)和近年来很热门的光纤拉曼放大器(FRA)，如对信号的调制形式、比特率的完全透明性、相位共轭、超宽的增益带宽、很低的噪声指数和具备优异的全光波长转换功能．     

相位敏感放大器的研究

首次对相位敏感放大器(PSA)的基本原理和特点进行了介绍。并对相位敏感放大器在光纤传输系统中的数学模型进行了分析。最后对其应用前景进行了展望。     

一种基于半导体光放大器的Ku波段可调谐光电振荡器

基于半导体光放大器(SOA)的非线性偏振旋转效应,提出了一种可调谐双环路光电振荡器(OEO),并从理论上分析了这种设计的基本原理。实验测得了振荡频率为12.978 GHz的微波信号的频谱图和相位噪声图,并且在Ku波段通过直接调节SOA注入电流得到调谐范围为40MHz,调谐步长约为2MHz的微波信号输出。在整个调谐范围内,输出微波信号的相位噪声在偏离中心频率10kHz处低于-75dBc/Hz。     

放大器噪声对色散管理光孤子传输的影响

采用变分法讨论了放大器噪声对色散管理光孤子脉冲参数的影响。讨论了ASE噪声对脉冲相位、脉冲中心时间和中心频率的影响，并且对比讨论了采用密集色散管理系统和降低平均色散值后，ASE噪声对脉冲的影响，结果表明：密集色散管理孤子系统和平均色散接近于零的色散管理系统更有利于降低放大器噪声对脉冲的扰动。     

用于SDH STM-64光接收机的GaAs HBT限幅放大器

采用2μm GaAs HBT工艺实现了10Gb/s的限幅放大器.整个系统包括一级输入缓冲、三级放大、一级用于驱动50Ω传输线的输出缓冲和失调电压补偿回路四个部分.采用双电源供电,正电源为3.3V,负电源为-2V,功耗为500mW.在输出电压幅度保持恒定(单端峰峰值300mV)的条件下,输入动态范围约为38dB.芯片面积为1.15×0.7mm².     

Low Voltage CMOS Power Amplifier with Rail-to-Rail Input and Output

This paper describes a CMOS power amplifier with rail-to-rail input and output, also suitable for low voltage applications. The amplifier uses Simple Miller Compensation with high bandwidth stage to robustly and power efficiently compensate the amplifier. Circuit also includes a common mode adapter block, based on resistive level shift network, to implement rail-to-rail input and optional adaptive biasing block, which can be used to extend bandwidth of the amplifier for large high frequency inputs in continuous-time applications. Measurement results show that the amplifier is capable of driving heavy resistive and capacitive loads having maximum output current exceeding 100 mA, when driving 1 nF ‖ 10 Ω load from 3.0 V supply. Without adaptive biasing the linear amplifier achieves 5.7 MHz unity gain frequency and 61^∘ phase margin when driving 1 nF ‖ 1 kΩ load, while drawing 2.4 mA from 1.5 V supply.     

小面积低功耗掩膜ROMASIC设计

本文介绍了一种利用0.6μm单硅双铝双阱CMOS工艺实现的4Kbit掩膜ROM专用集成电路设计(ASIC).ROM单元应用串行结构,整个芯片的面积为0.082mm².在5伏电源下,功率延迟积为0.036PJ/bit,最大工作电流为1.2mA,最大静态漏电流为0.1μA.采用一种新颖的灵敏放大器有效地提高了ROM的访问速度,ROM的访问时间为36ns.     

A 20-Gb/s wideband AGC amplifier with 26-dB dynamic range in 0.18-μm SiGe BiCMOS

This paper presents a 20-Gb/s automatic gain control (AGC) amplifier in a 0.18-μm SiGe BiCMOS for high-speed applications. The proposed AGC amplifier compactly consists of a folded Gilbert variable-gain amplifier (VGA), a post amplifier (PA), a 50-Ω output buffer, and AGC loop including an open-loop peak detector (PD), a RC low-pass filter (LPF), and an error amplifier (EA). The AGC amplifier achieves the broadband characteristic by utilizing inductive peaking and capacitive degeneration as well as f_T-doubler techniques to overcome the large parasitic capacitances. The proposed AGC circuits together with a linear VGA exhibits a wide gain control range of 45 dB for the received signal strength indication (RSSI). The measured AGC amplifier achieves a maximum gain of 21 dB and a -3-dB bandwidth (BW) of 20.6 GHz, which can support up to 25.4-Gb/s data rate. For the pseudorandom bit sequence (PRBS) length 2³¹–1 with a bit-error rate (BER) of 10⁻¹² at 20 Gb/s, the measured input dynamic range is 26 dB (20–400mV_pp) and the peak-to-peak data jitter is less than 8 ps. The AGC amplifier consumes a power of 160 mW from a 3.3-V supply voltage and occupies an area of 850 μm × 850 μm.     

掺Er3+钨碲玻璃光纤放大器的特性研究

以WO₃、TeO₂、ZnO和Na₂O为基质制备了掺Er³⁺钨碲(EDWTZn)玻璃.差热分析表明EDWTZn玻璃的转变温度达到427℃,比常规碲酸盐玻璃具有更高的热稳定性.McCumber原理研究的结果显示,EDWTZn玻璃在1530nm处的峰值受激发射截面和荧光发射半高宽分别为9.52×10^-21cm²和86nm.数值模拟结果表明,EDWTZn光纤放大器利用较短的激活长度就可获得足够的信号光放大,在1530nm波长附近能提供极宽的平坦增益带,当输入信号光功率为0dBm时,在大约70nm带宽范围内的平均信号增益大于20dB,不平坦度小于5dB.     

Ultra-wideband amplifiers based on Bi2O3-EDFAs

We demonstrate broadband amplification over (C + L)-band or extended L-band using fusion-spliceable Bi₂O₃-based erbium doped fiber (EDF). A power conversion efficiency (PCE) of 39% is achieved. In a single-stage amplifier we achieved a 3 dB bandwidth of 75 nm. In addition we showed very low four-wave mixing in an extended L-band amplifier by reducing the length of fiber required to a few meters.     

具有30dB增益和1-16GHz带宽的CMOS低噪声中频放大器

This paper presents a high-gain wideband low-noise IF amplifier aimed for the ALMA front end system using 90-nm LP CMOS technology.A topology of three optimized cascading stages is proposed to achieve a flat and wideband gain.Incorporating an input inductor and a gate-inductive gain-peaking inductor,the active shunt feedback technique is employed to extend the matching bandwidth and optimize the noise figure.The circuit achieves a flat gain of 30.5 dB with 3 dB bandwidth of 1-16 GHz and a minimum noise figure of 3.76 dB.Under 1.2 V supply voltage,the proposed IF amplifier consumes 42 mW DC power.The chip die including pads takes up 0.53 mm~2,while the active area is only 0.022 mm~2.     

Novel cross-connected cascode differential amplifier

We report on a novel amplifier circuit–differential cross-connected cascode1 1.?Reported briefly on WSEAS and ICECS Conferences. . Its fundamental distinction from an ordinary differential cascode lies in simultaneous feeding of input signal both to the common emitter (source) and common base (gate) stages, which are cross-connected. Such a connection results in the creation of two loops of positive current feedback. The stability of the amplifier is achieved due to low gain and phase shift in the loops. We show that the input signal is amplified in the input circuit. The input and output impedances are gained significantly as well. The current gain is increased considerably and the bandwidth is essentially expanded. Simulation results of such a cascode designed with IBM BJT sige5am and CMOS bicmos7hp transistors are presented. When compared with the ordinary cascode, the predicted and actually obtained bandwidths proved to be more than twice as wide: 8.6–18.7 GHz and 3.4–8.7 GHz on BJT and CMOS based, respectively.     

65nm工艺下20Gb/s无电感限幅放大器设计与分析

本文设计了一款能工作在20Gb/s速率下的无电感限幅放大器。限幅放大器包括三各部分：带直流失调消除的输入匹配级,增益级和输出驱动级。本设计采用交叉负反馈技术,使得放大器在获得高带宽的同时拥有较为平坦的频率响应。直流失调消除环路中增加了误差放大器来保证直流失调消除效果。放大器在65纳米工艺下成功流片,芯片面积为0.45 × 0.25平方毫米（不包括PAD）,测试结果显示放大器的差分增益为37dB,带宽为16.5GHz,在高达26.5GHz的频率内Sdd11和Sdd22分别小于-16dB和-9dB。除了驱动级,整个放大器在1.2V的电源电压下消耗50mA的电流。     

大动态范围增益可控固态放大器系统的实现

针对雷达发射多波束的需求,研制了一套基于氮化镓高电子迁移率晶体管三代半导体器件的增益可控固态放大器系统。描述了系统中微波放大模块、幅相控制和相位补偿的实现方案,分析了功率放大器栅极电压与放大器增益和输出信号相位的关系。通过幅相控制电路实现发射通道输出信号幅度和相位快速转换,满足发射多波束的需求。经试验验证,研制的大动态范围增益可控固态放大器系统,提高了效率和工作带宽,解决了传统发射多波束系统中的问题。