CMOS射频电路的发展趋势

本文介绍目前正在研发、将来终将成为主流射频收发器的CMOS射频电路的体系结构和电路设计,设计实例将展示CMOS射频电路的良好性能,并预示CMOS射频集成电路取代砷化镓和SiGe电路实现系统集成。     

宽带超短波射频前端的设计和实现

宽带超短波射频前端是软件无线电通信平台的关键部分之一。在此介绍了集成宽带调制芯片TRF372017和解调芯片ADRF6850,设计了宽带超短波射频模块的实现方案。基于这两款芯片分别实现了发送电路和接收电路,并结合软件无线电基带处理平台加载了宽带通信波形进行测试。测试结果显示,该射频模块具有较好的性能,且具有体积小,功耗低,增益控制范围大等优点。     

一种对讲机射频前端模块的实现

本次设计的对讲机射频前端,采用高集成度的射频功率放大集成技术,可以取代传统复杂的电路设计,使对讲机的射频前端更加的简洁化,智能化。设计的整体方案是射频放大电路、电压控制电路,射频匹配电路、开关控制电路以及射频滤波电路完全的高度集成在一个模块上,大大节约了空间和设计成本。     

基于积累型MOS变容管的射频压控振荡器设计

随着移动通信技术的发展，射频（RF）电路的研究引起了广泛的重视。采用标准CMOS工艺实现压控振荡器（VCO），是实现RF CMOS集成收发机的关键。过去的VCO电路大多采用反向偏压的变容二极管作为压控器件，然而在用实际工艺实现电路时，会发现变容二极管的品质因数通常都很小，这将影响到电路的性能。于是，人们便尝试采用其它可以用CMOST艺实现的器件来代替一般的变客二极管，MOS变容管便应运而生了。     

集成运放的非线性失真分析及电路应用

集成运放差分放大电路的非线性失真分析,可以用来对集成运放电路特性进行优化设计,抑制带内各次谐波的产生。对双集成运放AD8062的非线性参数分析,优化其外围电路的连接方式,减小共模输入电压,实现了集成运放的线性输出。AD8062的电路优化设计提高了ISM频段定位系统接收前端射频电路增益,有效抑制了各次谐波的产生,输出信号幅度满足后端A/D采样器的门限要求。     

射频电路中混频器的设计

目前实现小型化以及低功耗射频电路的一种可行性方法是实现收发机射频电路的集成。在射频电路的前端,混频器是实现频谱搬移的重要器件,是十分重要的模块。设计了一种微带平衡混频器,其主要由3dB定向耦合器、匹配电路、晶体管和低通滤波器组成,滤波器用来滤除输出信号中高次谐波频率成分,从而得到需要的中频成分。然后用ADS软件进行各部分电路设计、仿真,从功能仿真图中看到输出信号的频谱中有需要的中频频率成分,这就验证了混频器频谱搬移的功能。     

基于BGA互联的毫米波模块三维集成设计

设计了一种利用微波基板作为转接板的毫米波系统级封装（System in Package,SIP）模块。采用球栅阵列(Ball Grid Array,BGA)作为射频信号层间垂直互联传输和隔离结构,实现了三维集成毫米波模块的低损耗垂直传输。对样件测试结果显示,在28~31 GHz频率范围之间,其端口驻波小于1.5,增益大于30 dB。该三维集成结构简单,射频传输性能良好,其体积仅为传统二维平面封装结构的20%,实现了模块的小型化,可广泛用于微波和毫米波电路与系统。     

毫米波系统级封装中的基板功能化实现

阐述了毫米波系统级封装（SOP）架构中基板功能化的概念、作用及实现方法。提出了利用低温共烧陶瓷（LTCC）技术,在SOP多层陶瓷基板中一体化集成多种无源电路单元,使封装基板在作为表面贴装有源芯片载体的同时,自身具备相应的无源射频功能。最终通过设计实例的仿真、加工及测试对比,验证了在SOP架构下实现封装基板功能化的可行性,及其所具有的良好的射频滤波、层间信号互联、射频接口过渡等电气性能。     

一种带有改进的25%占空比本振产生电路的WCDMA/GSM高线性度接收机射频前端分析与设计

本文提出了一种满足WCDMA/GSM系统要求的全集成接收机射频前端。WCDMA模式下无需声表面波滤波器。为了提高包括IP3和IP2指标在内的线性度性能,射频前端包括电容减敏的多栅低噪声放大器、带有本文提出的IP2校准电路的电流模式无源混频器以及似Tow-Thomas结构的双二阶可重构跨阻放大器。本文提出了一种新的低功耗、低相噪、可产生四相25%占空比本振信号的多模分频器。同时,本文通过采用带有片上电阻的恒定gm偏置电路,减小工艺和温度对转换增益的影响。本文中的射频前端电路集成在一个0.13um CMOS工艺下实现的带有片上频率综合器的接收机中。测试结果显示,在这个高线性度射频前端的帮助下,对于所有的模式和频带,接收机可以获得-6dBm的IIP3和至少 60dBm的IIP2。     

毫米波系统级封装中的基板功能化实现

阐述了毫米波系统级封装( SOP)架构中基板功能化的概念、作用及实现方法。提出了利用低温共烧陶瓷( LTCC)技术,在SOP多层陶瓷基板中一体化集成多种无源电路单元,使封装基板在作为表面贴装有源芯片载体的同时,自身具备相应的无源射频功能。最终通过设计实例的仿真、加工及测试对比,验证了在SOP架构下实现封装基板功能化的可行性,及其所具有的良好的射频滤波、层间信号互联、射频接口过渡等电气性能。     

A review on RF ESD protection design

Radio frequency (RF) electrostatic discharge (ESD) protection design emerges as a new challenge to RF integrated circuits (IC) design, where the main problem is associated with the complex interactions between the ESD protection network and the core RFIC circuit being protected. This paper reviews recent development in RF ESD protection circuit design, including mis-triggering of RF ESD protection structures, ESD-induced parasitic effects on RFIC performance, RF ESD protection solutions, as well as characterization of RF ESD protection circuits.     

A Novel Circuit Architecture for High Performance of High-order Subharmonic Mixers

A novel circuit architecture for high performance of high-order subharmonic (SH) mixers is proposed in this paper. According to the specified harmonic mixing order, one or more mixer diodes sub-arrays and corresponding power divider as well as phase shift network for RF and LO signals are arranged in the circuit. This proposed SH mixer circuit has improved conversion loss, wide dynamic range and high port isolation for high-order SH mixers. By phase cancellation of idle frequencies, the proposed SH mixer circuit can eliminate complicated design procedure of idle frequency circuits; by phase cancellation of leakage LO power to RF and IF port, and leakage RF power to LO port, the mixer circuit can get high port isolation in LO-IF/RF and RF-LO. The increased antiparallel diode pairs in each sub-array will also lead to well performance by lowering effective series resistance. The proposed SH mixer circuit can be easily realized with power divider and phase shift network for RF and LO signals.     

声表面波RFID读卡器射频模块预算分析及仿真

声表面波射频识别读卡器射频模块是读卡器硬件的关键部分,如何按照一定的要求选择合适的元器件合理地设计出满足系统性能的射频模块电路是非常重要的。利用ADS2006软件对选定方案的射频模块电路进行系统级的射频预算分析,可以分配各个环节的性能参数,缩短了开发周期、节约了成本,并为后续的行为级仿真及模块电路调试测试提供了指导。     

宽带数字接收机射频前端电路设计

宽带数字接收机在无线电频谱管理领域内具有重要的应用,其中射频前端电路指标对整机设备性能的影响显著。文中介绍了一种射频前端电路通用的设计方案,重点分析了各射频器件性能指标对接收机链路的影响,以及对无线电监测与测向结果的影响。最终提出了改进电路拓扑结构设计的措施与办法,并给出了基于该设计思路的具体工程应用实例,取得了良好的应用效果。     

Thermal and package performance limitations in LDMOSFET's for RFICapplications

This paper presents a systematic study of the limitations imposed by thermal and packaging considerations on radio-frequency (RF) performance of Si bulk and silicon-on-insulator (SOI) lateral DMOSFET's (LDMOSFET's). Several bulk and SOI devices are studied with the help of measurements as well as two-dimensional device simulations incorporating electrothermal models. Model parameters are extracted and used in circuit simulators to perform RF characterization of these devices. Further, a new three-region theory for the LDMOSFET is discussed and used to evaluate the static and RF performance of the devices in a nonisothermal environment. This paper shows that the package plays an important role in RF performance of SOI and bulk devices due to self-heating effects within the device. A detailed DC and RF performance evaluation is presented. Significant drift is observed in RF performance of bulk and SOI devices due to self-heating considerations. The physical understanding of these thermal effects within the device can facilitate the design of better packages for bulk and SOI devices     

A New Automatic Compensation Network for System‐on‐Chip Transceivers

This paper proposes a new automatic compensation network (ACN) for a system‐on‐chip (SoC) transceiver. We built a 5 GHz low noise amplifier (LNA) with an on‐chip ACN using 0.18 µm SiGe technology. This network is extremely useful for today's radio frequency (RF) integrated circuit devices in a complete RF transceiver environment. The network comprises an RF design‐for‐testability (DFT) circuit, capacitor mirror banks, and a digital signal processor. The RF DFT circuit consists of a test amplifier and RF peak detectors. The RF DFT circuit helps the network to provide DC output voltages, which makes the compensation network automatic. The proposed technique utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance, gain, and noise figure using the developed mathematical equations. The ACN automatically adjusts the performance of the 5 GHz LNA with the processor in the SoC transceiver when the LNA goes out of the normal range of operation. The ACN compensates abnormal operation due to unusual thermal variation or unusual process variation. The ACN is simple, inexpensive and suitable for a complete RF transceiver environment.     

RF circuit performance degradation due to soft breakdown andhot-carrier effect in deep-submicrometer CMOS technology

A systematic study of RF circuit performance degradation subject to oxide soft breakdown (SBD), and hot-carrier (HC) stress is presented in this paper. DC and RF characteristics before and after stress are extracted from the experimental data. The effects of SBD and HC stress on s-parameters, cutoff frequency, third-order interception point, and noise parameters are examined. The performance drifts of gain, noise figure, linearity, and input matching of the RF low-noise amplifier are demonstrated by SpectreRF simulation results based on measured device data     

The effect of RF-driven gate current on DC/RF performance in GaAs pHEMT MMIC power amplifiers

This paper describes RF-driven gate current effects on the dc/RF performance of 0.15-/spl mu/m (gate length) 2-mil (substrate thickness) GaAs pseudomorphic high-electron mobility transistor (pHEMT) monolithic microwave integrated circuit power amplifiers (PAs). High gate current is generated in PAs under RF drive at room temperature. A long-term lifetest of PAs with various gate currents induced by RF drive was performed to investigate the effect of RF-driven gate current on dc/RF performance in GaAs pHEMT PAs. Accordingly, an empirical model was developed to predict the dc/RF performance of V-band PA modules by the end of life (EOL). This information is crucial for system engineers in order to budget sufficient output power so that the system can still maintain performance capability by EOL.     

Design and performance analysis of double-gate MOSFET over single-gate MOSFET for RF switch

In this paper, we have designed a double-gate MOSFET and compared its performance parameters with the single-gate MOSFET as RF CMOS switch, particularly the double-pole four-throw (DP4T) switch, for the wireless telecommunication systems. A double-gate radio-frequency complementary metal-oxide-semiconductor (DG RF CMOS) switch operating at the frequency of microwave range is investigated. This RF switch is capable to select the data streams from antennas for both the transmitting and receiving processes. We emphasize on the basics of the circuit elements (such as drain current, threshold voltage, resonant frequency, resistances at switch ON condition, capacitances, and switching speed) required for the integrated circuit of the radio frequency sub-system of the DG RF CMOS switch and the role of these basic circuit elements are also discussed. These properties presented in the switches due to the double-gate MOSFET and single-gate MOSFET have been discussed.     

射频集成电路测试技术研究

射频集成电路(RFIC)是无线通信、雷达等电子系统中非常关键的器件，由于其高频特点，准确评估RFIC的性能具有相当的难度。文章以射频低噪声放大器(LNA)为例，运用微波理论，分析了RFIC典型参数，如S参数、带宽、PldB、OIP3以及噪声系数等的测试原理和测试方法，并对影响RFIC性能测试的主要因素进行了分析。最后，给出了一种LNA电路的测试结果。