混合蛙跳算法及其改进算法的运动轨迹及收敛性分析

本文通过求解差分方程分析混合蛙跳算法(Shuffled Frog Leaping Algorithm,SFLA)青蛙运动轨迹;进一步利用Solis和Wets提出的随机搜索算法收敛性判据讨论SFLA全局收敛性,得出SFLA全局收敛的结论;为提高SFLA收敛效率,提出一种在SFLA深度搜索方向上融合极值动力学优化(Extremal Optimization,EO)的改进算法EO-SFLA,并证明其依概率1收敛于全局最优.EO-SFLA中,改进的EO变异概率选取方式拓展了算法搜索空间,赋予了算法跳出局部极值点的能力,保证了算法全局收敛性.通过四个广泛使用的基准函数对两种算法进行实验仿真,仿真结果表明改进算法在保持全局收敛性的同时显著提高收敛速度.     

基于改进的蛙跳算法的神经网络在语音情感识别中的研究

本文提出了一种改进的混合蛙跳算法,利用混沌运动的遍历性改善初始个体的质量和引入高斯变异,提高了算法的全局搜索能力,同时将改进算法与人工神经网络结合,并把它应用到语音情感识别系统中.依据情感的维度空间模型.分别提取了情感语音的韵律特征与音质特征,研究了谐波噪声比特征随情感类别的变化特性.利用本文所提的蛙跳算法(SFLA)训练随机产生的初始数据,优化神经网络的连接权值,能快速地实现网络的收敛.在实验中比较了BP神经网络、RBF神经网络与改进SFLA神经网络分别用于语音情感以别的识别性能,结果表明基于改进SFLA的神经网络的平均识别率高于BP神经网络9.2个百分点,高于RBF神经网络7.9个百分点.因此本文所提的蛙跳神经网络用于语音情感识别能获得明显的识别性能的提升.     

贪婪随机自适应灰狼优化算法求解TSP问题

对于求解TSP问题,提出一种贪婪随机自适应灰狼优化算法(GRAGWO)。GRAGWO算法基于贪婪随机自适应搜索算法(GRASP),采用其构造阶段生成初始解,在局部搜索阶段采用灰狼优化算法(GWO)对结果进行优化。GWO算法不能直接用于求解离散问题,易陷入局部最优,导致后期收敛速率较低。根据TSP问题的特性,针对易形成局部最优路径和随着迭代次数增进而导致种群多样性减退这两个缺陷,重新定义灰狼编码方式,与GRASP启发式算法相结合,应用于求解TSP问题。采用TSPLIB中的多组不同规模的TSP问题作为实验用例,并将GRAGWO算法与其他仿生算法进行对比,结果表明在求解准确率、稳定性和解决大型城市问题方面具有相对优势。     

改进元胞粒子群算法求解JSP问题

为求解离散JSP(作业车间调度)问题,设计了基于四方形网格的元胞粒子群算法。引入变异策略增强了算法跳出局部最优的能力,对每代粒子群引入变邻域搜索提高了算法的局部搜索能力。数值实验表明,改进的元胞粒子群优化算法具有好的收敛性与求解精度。     

求解旅行商问题的改进混合蛙跳算法

混合蛙跳算法（Shuffled Frog Leaping Algorithm,SFLA）是解决组合优化问题的有效方法,’但是应用于TSP问题时,由于SFLA没有充分利用最佳个体的优良信息,导致收敛速度太慢。文中把遗传算法（Genetic Algorithm,GA）的交叉和变异引入SFLA,提出了一种针对旅行商问题（Traveling Salesman Problem,TsP）的改进混合蛙跳算法（Improved Shuffled Frog Leaping Al—gorithm,ISFLA）。应用于TSP的实验结果表明：ISFLA的收敛速度明显高于SFLA,同时优于GA和简单翻转算子。ISFLA不仅表现出了更快的收敛速度,而且能有效地缓解局部早熟收敛。     

基于生物地理学算法的稀疏平面阵列优化

天线阵列的相对旁瓣电平和阵元位置为非线性关系。对于非线性关系求最优值问题,用其他优化算法较难求解,而研究采用智能算法求解是一条值得探索的可行路径。提出了一种混合智能算法——改进生物地理学算法,即对生物地理学算法的迁移算子和变异算子进行改进,以提高种群的进化速率,进而优化对称和非对称稀疏平面阵列。仿真结果表明,与以往的算法相比,该算法提高了优化速率,降低阵列的相对旁瓣电平;阵元在阵列孔径内非对称分布比对称分布,所获得的旁瓣电平更低。     

基于改进免疫遗传算法的带硬时间窗车辆调度问题的实现

免疫算法是模仿生物体高度进化,复杂的免疫系统仿生的一种智能化启发式算法。带硬时间窗的车辆路径问题(VSPHTW)是在基本的车辆路径问题(VSP)上增加了时间窗约束条件的一种变化形式,是一个典型的NP难题。通过采用一种改进的信息熵计算方法、交叉和变异概率的自适应机制,构造一个改进的免疫算法来求解VSPHTW,并将求解结果与其他遗传算法比较。比较结果显示,该算法对于求解VSPHTW问题具有较好的性能。     

混合变异花授粉算法

花授粉算法是由Yang提出的一种新型元启发式优化算法,存在易陷入局部最优、求解精度不高等缺陷,为了进一步改善其寻优性能,提出了一种混合变异的花授粉算法(HMFPA),分别针对全局授粉和局部授粉2个过程设计了混沌随机扰动和交流算子,有效地平衡了算法的局部搜索和全局开发,并用多个标准测试函数验证算法的有效性,实验结果表明,本文提出的改进算法的各个寻优指标均优于基本花授粉算法和差分进化策略的花授粉算法.     

一种求解连续对象优化问题的改进蚁群算法

蚁群算法在搜索过程中容易陷入局部最优解，且不适用于连续对象优化问题。文章针对这些问题．采用信息量变异、引入微粒群操作等方法进行改进，提出了一种引入微粒群操作的改进蚁群算法，并应用于求解连续对象优化问题。对几个典型复杂连续函数优化问题的测试研究表明，该改进算法不仅跳出局部最优解的能力更强．而且能较快地收敛到全局最优解，表明了算法的有效性。     

实数遗传算法的改进及性能研究

提出一种粒子群优化方法(PSO)与实数编码遗传算法(GA)相结合的混合改进遗传算法(HIGAPSO).该方法采用混沌序列产生初始种群、非线性排序选择、多个交叉后代竞争择优和变异尺度自适应变化等改进遗传操作;并通过精英个体保留、粒子群优化及改进遗传算法(IGA)三种策略共同作用产生种群新个体,来克服常规算法中收敛速度慢、早熟及局部收敛等缺陷.通过四个高维典型函数测试结果表明该方法不但显著提高了算法的全局搜索能力,加快了收敛速度;而且也改善了求解的质量及其优化结果的可靠性,是求解优化问题的一种有潜力的算法.     

Fractal character of the auditory neural spike train

Long-counting-time pulse-number distributions (PND's) were measured from a broad variety of cat primary auditory fibers using different tone and noise stimuli, counting times T, and number of samples NT. Whereas short-counting-time PND's (T approximately 50 ms) manifest the presence of spike pairs (an enhancement of even over odd-count probabilities), the irregular shapes of the long-counting-time PND's (T approximately greater than 0.1 s) reveal that the underlying sequence of action potentials consists of spike clusters when viewed on a longer time scale. For all units measured, the count variance-to-mean ratio (Fano factor) F(T) varied little over some 90 dB change in the stimulus level. On the other hand, F(T) increased substantially as T and/or NT were increased, corresponding to the capture of larger and larger spike clusters in the counting time. A relationship is developed between the Fano-time function F(T) and the normalized coincidence rate function, g(tau) versus delay time tau. A plausible form for g(tau) leads to a Fano-time function in good accord with the data. The observed power-law growth of the Fano factor for large counting times [F(T) approximately T alpha where 0 less than alpha less than 1] is accompanied by a power-law decay of the coincidence rate for large delay times [g(tau) approximately tau alpha -1] and a power-law form for the power spectral density at low frequencies [S(f) approximately f -alpha]. The behavior of the PND's and the scale invariance implicit in these fractional-power-law relationships suggest that the neural events on all primary auditory fibers exhibit fractal behavior for sufficiently large times (sufficiently low frequencies). The spike pairs and spike clusters in the PND's are natural consequences of this behavior. The fractal dimension D identical to alpha is estimated to be in the range of 0.3 approximately less than D approximately less than 0.9 for counting times in the range 0.1-10 s. The fractal dimension provides a measure of the degree of event clustering, or irregularity of a sequence of events, that is preserved over different time scales. PND's from low-skew vestibular units, in contrast, do not exhibit fractal behavior. It is suggested that auditory neural-firing patterns may serve to efficiently sample natural fractal noises.     

Enhancement of ferromagnetism in the colossal-magnetoresistance layered manganite La<Subscript>1.2</Subscript>Ba<Subscript>1.8</Subscript>Mn<Subscript>2−x</Subscript>Ru<Subscript>x</Subscript>O<Subscript>7</Subscript> (x = 0, 0.1, 0.5, and 1)

Electrical transport and magnetic measurements of the Ru-doped, layered manganite system, La_1.2Ba_1.8Mn_2−xRu_xO₇ (x=0, 0.1, 0.5, and 1), have been carried out in the temperature range of 5–310 K and in the presence of magnetic fields up to 10 T. The magnetic transition temperatures are found to be above room temperature, and colossal magnetoresistance (CMR) is present at low temperatures and even close to room temperature. Magnetoresistance (MR) is found to obey power-law behavior as a function of applied field with an exponent close to 0.5 at low temperatures.     

Voltage dependent degradation of HfSiON/SiO2 nMOSFETs under positive bias temperature instability

This paper investigates voltage-dependent degradation of HfSiON/SiO₂ nMOSFETs under conditions of positive bias temperature instability (PBTI), and proposes a PBTI degradation model that can use data from acceleration tests to predict device lifetime accurately. Experimental results show that the PBTI stress generated shallow traps in HfSiON and the exponent of power-law for threshold-voltage shift increased exponentially with an increase of PBTI stress voltage. An enhancement factor that represents creation of shallow charge traps in gate dielectric by PBTI stress was included in the proposed model. The proposed model predicted operational lifetime t_L = 1.64 × 10¹⁰ s, which agreed well with the t_L = 1.92 × 10¹⁰ s measured at low gate stress voltage, whereas the conventional model overestimates t_L by an order of magnitude, demonstrating that the proposed model is very useful on shortening the measurement time for estimating t_L of high-k nMOSFETs.     

A compact planar ultra-wideband bandpass filter with multiple resonant and defected ground structure

A compact bandpass filter with dumbbell shape Defected Ground Structure (DGS) operating on ultra wide pass band (UWB – 3.1 to 10.6 GHz) is proposed. It is based on hybrid microstrip coplanar waveguide (dual sided metal) structure. A Multiple Resonant Structure (MRS) is constructed using coplanar waveguide (CPW) planar transmission line. The MRS makes the resonance using quarter wavelength and half wavelength open-ended CPW. The equispaced three resonances at lower (3.1 GHz), center (6.85 GHz) and higher edge (10.6 GHz) of the whole Ultra Wide Band is achieved using CPW MRS. To make the band as flat as possible, two more resonances are introduced using quarter wavelength microstrip patches on top of the commonly shared substrate, so the proposed filter becomes a five pole bandpass filter. A dumbbell shaped defected ground structure on either side of CPW MRS improves the return loss almost less than 20 dB over the whole UWB passband. The simulated results of proposed filter show good transmission response within passband and good rejection in out of the band. The simulated and measured results are very close to each other which proves the efficacy of proposed design.     

Internally compensated LDO regulator based on the cascoded FVF

In this paper, an internally compensated low dropout (LDO) voltage regulator based on the Flipped Voltage Follower (FVF) is proposed. By means of capacitive coupling and dynamic biasing, the transient response to both load and line variations is enhanced. The proposed circuit has been designed and fabricated in a standard 0.5 µm CMOS technology. Experimental results show that the proposed circuit features a line and a load regulation of 132.04 µV/V and 153.53 µV/mA, respectively. Moreover, the output voltage spikes are kept under 150 mV for a 2 V-to-5 V supply variation and for 1 mA-to-100 mA load variation, both in 1 µs.     

A systematic design approach for low-power 10-bit 100 MS/s pipelined ADC

A systematic design approach for low-power 10-bit, 100 MS/s pipelined analog-to-digital converter (ADC) is presented. At architectural level various per-stage-resolution are analyzed and most suitable architecture is selected for designing 10-bit, 100 MS/s pipeline ADC. At Circuit level a modified wide-bandwidth and high-gain two-stage operational transconductance amplifier (OTA) proposed in this work is used in track-and-hold amplifier (THA) and multiplying digital-to-analog converter (MDAC) sections, to reduce power consumption and thermal noise contribution by the ADC. The signal swing of the analog functional blocks (THA and MDAC sections) is allowed to exceed the supply voltage (1.8 V), which further increases the dynamic range of the circuit. Charge-sharing comparator is proposed in this work, which reduces the dynamic power dissipation and kickback noise of the comparator circuit. The bootstrap technique and bottom plate sampling technique is employed in THA and MDAC sections to reduce the nonlinearity error associated with the input signal resulting in a signal-to-noise-distortion ratio of 58.72/57.57 dB at 2 MHz/Nyquist frequency, respectively. The maximum differential nonlinearity (DNL) is +0.6167/−0.3151 LSB and the maximum integral nonlinearity (INL) is +0.4271/−0.4712 LSB. The dynamic range of the ADC is 58.72 dB for full-scale input signal at 2 MHz input frequency. The ADC consumes 52.6 mW at 100 MS/s sampling rate. The circuit is implemented using UMC-180 nm digital CMOS technology.     

基于粗粒度可重构阵列结构的多标准离散余弦变换设计

在视频信号的编解码流程中,离散余弦变换(DCT)是一个至关重要的环节,其决定了视频压缩的质量和效率。针对88尺寸的2维离散余弦变换,该文提出一种基于粗粒度可重构阵列结构(Coarse-Grained Reconfigurable Array, CGRA)的硬件电路结构。利用粗粒度可重构阵列的可重配置的特性,实现在单一平台支持多个视频压缩编码标准的88 2维离散余弦变换。实验结果显示,这种结构每个时钟周期可以并行处理8个像素,吞吐率最高可达1.157109像素/s。与已有结构相比,设计效率和功耗效率最高可分别提升4.33倍和12.3倍,并能够以最高30帧/s的帧率解码尺寸为40962048,格式为4:2:0的视频序列。     

LSA based multi-instance learning algorithm for image retrieval

Focusing on the problem of natural image retrieval, based on latent semantic analysis (LSA) and support vector machine (SVM), a novel multi-instance learning (MIL) algorithm is proposed, where a bag corresponds to an image and an instance corresponds to the low-level visual features of a segmented region. Firstly, in order to transform every bag into a single sample, a collection of “visual-word” is generated by k-means clustering method to construct a projection space, then a nonlinear mapping is defined using these “visual-word” to embed each bag as a point in the projection space, thereby obtaining every bag's projection feature. Secondly, the matrix consisted of all the projection features of training bags is regarded as a term-document matrix, and LSA method is used to obtain the latent semantic feature of each bag. As a result, the MIL problem is converted into a standard single instance learning (SIL) problem that can be solved directly by SVM method. Experimental results on the COREL data sets show that the proposed method, named LSASVM-MIL, is robust, and its performance is superior to other key existing MIL algorithms.     

基于层次混合的高效概率包标记WSNs节点定位算法

在利用概率包标记技术对无线传感器网络(WSN)恶意节点的追踪定位中,标记概率的确定是关键,直接影响到算法的收敛性,最弱链,节点负担等方面。该文分析并指出了基本概率包标记(BPPM)和等概率包标记(EPPM)方法的缺点,提出了一种层次式混合概率包标记(LMPPM)算法,可以克服以上算法的不足。该算法对无线传感器网络进行分簇,将每个簇看成一个大的簇节点,整个网络由一些大的簇节点构成,每个簇节点内部又包含一定数量的传感器节点。在簇节点之间采用等概率包标记法,在簇节点内部采用基本概率包标记法。实验分析表明,该算法在收敛性、最弱链方面优于BPPM算法,在节点计算与存储负担方面优于EPPM算法,是在资源约束条件下的一种整体优化。     

High slew rate current mode transconductance error amplifier for low quiescent current output-capacitorless CMOS LDO regulator

This paper presents a CMOS low quiescent current output-capacitorless low-dropout regulator (LDO) based on a high slew rate current mode transconductance amplifier (CTA) as error amplifier. Using local common-mode feedback (LCMFB) in the proposed CTA, the order of transfer characteristic of the circuit is increased. Therefore, the slew rate at the gate of pass transistor is enhanced. This improves the LDO load transient characteristic even at low quiescent current. The proposed LDO topology has been designed and post simulated in HSPICE in a 0.18 µm CMOS process to supply the load current between 0 and 100 mA. The dropout voltage of the LDO is set to 200 mV for 1.2–2 V input voltage. Post-layout simulation results reveal that the proposed LDO is stable without any internal compensation strategy and with on-chip output capacitor or lumped parasitic capacitances at the output node between 10 and 100 pF. The total quiescent current of the LDO including the current consumed by the reference buffer circuit is only 3.7 µA. A final benchmark comparison considering all relevant performance metrics is presented.