Design and realisation of dual-band 3 dB power divider based on two-section transmission-line topology

A new dual-band 3 dB three-port power divider with arbitrary impedance terminations is proposed. The structure is composed of a two-section transmission-line transformer and an isolation resistor. Each transmission line's electrical length is /spl pi//3 at the fundamental frequency. Based on an ideal transmission line model, new design equations and graphs are given. The technique is validated by the experimental results on a 3 dB 900/1800 MHz power divider with Z/sub S/=100 /spl Omega/ and Z/sub L/=50 /spl Omega/. Good performances of the proposed power combiner/divider at both frequencies are obtained.     

Low-loss coplanar waveguides interconnects on low-resistivity silicon substrate

This paper describes fabrication, characterization and simulation of low-loss coplanar waveguide (CPW) interconnects on low-resistivity silicon substrate. The fabrication of CPWs is low-temperature (below 250/spl deg/C) and incorporates a spin-on low-k dielectric benzocyclobutene (BCB) and self-aligned electroplating of copper. The performance of CPWs is evaluated by high-frequency characterization and EM simulation. CPWs with different line width (W) and line spacing (S) are investigated and compared. Using a BCB layer as thick as 20 /spl mu/m, CPW fabricated on a low-resistivity silicon substrate exhibits an insertion loss of 3 dB/cm at 30 GHz.     

Compact EBG in-phase hybrid-ring equal power divider

A novel electromagnetic-bandgap (EBG) in-phase hybrid-ring equal power divider is described. Coupled with the closed-form analytical expressions for the EBG structure, a systematic technique of design is presented for the first time. Compared to the conventional hybrid-ring equal power divider, based on the 15-dB return-loss criteria, an increase in both the input and output impedance bandwidth of approximately 10% from a starting frequency of 2.5 GHz, and a phase error of 0.006/spl deg/ within the passband have been achieved for the proposed structure. The proposed in-phase hybrid-ring equal power divider, besides providing a much broader bandwidth and occupying a smaller estate area, also possesses good harmonic suppression characteristic.     

A miniaturized Wilkinson power divider with CMOS active inductors

A miniaturized Wilkinson power divider implemented in a standard 0.18-/spl mu/m CMOS process is presented in this letter. By using active inductors for the circuit implementation, a significant area reduction can be achieved due to the absence of distributed components and spiral inductors. The power divider is designed at a center frequency of 4.5GHz for equal power dividing with all ports matched to 50/spl Omega/. Drawing a dc current of 9.3mA from a 1.8-V supply voltage, the fabricated circuit exhibits an insertion loss less than 0.16dB and a return loss better than 30dB at the center frequency while maintaining good isolation between the output ports. The active area of the miniaturized Wilkinson power divider is 150/spl times/100/spl mu/m/sup 2/, which is suitable for system integration in monolithic microwave integrated circuit (MMIC) applications.     

Attenuation mechanisms of aluminum millimeter-wave coplanar waveguides on silicon

The loss mechanisms of silicon coplanar waveguides (CPW) with aluminum metallization are investigated up to 40 GHz. Three main parts contribute to the attenuation of coplanar waveguides (CPWs): the frequency-dependent conductor losses of the metallization, frequency-independent substrate losses, and the specifically investigated bias-dependent interface losses caused by free charges at the Si-SiO/sub 2/ interface. The minimum losses found in 50-/spl Omega/ CPWs with 45-/spl mu/m signal line width were 0.19 db/mm at 10 GHz and 0.33 dB/mm at 40 GHz. High-purity silicon from a float zone (FZ) process was used as substrate. Substrates with lower purity from a Czochralski (CZ) process (resistivity 50-100 /spl Omega/cm) resulted in somewhat higher (0.2-0.3 dB/mm) losses for the same CPW geometry.     

一分二十微带Wilkinson功分器的设计

介绍了一种工作在S频段,一分二十的威尔金森功率分配器的设计方法,20个输出端口为1:1的等功率分配,系统阻抗为50 Ω。使用软件Advanced Design System 2009进行仿真,在2.17~2.20 GHz的工作频率内,表现出良好的电气性能,输入端口反射系数在-18 dB,该功分器的20个输出端口的相位和幅度具有良好的一致性,端口幅度平衡度为±0.3 dB,相位平衡度±2°,输出端口的隔离度在-25 dB以下。     

A 44-/spl mu/W 4.3-GHz injection-locked frequency divider with 2.3-GHz locking range

A microwatt frequency divider for the 2.5-GHz ISM band is proposed. This divider directly modulates the output in a ring oscillator by means of a switch and realizes low power consumption with low supply voltage and a wide locking range. It is fabricated using a five-layer-metal and 0.2-/spl mu/m-gate length CMOS process. The core size is 10.8/spl times/10.5 /spl mu/m/sup 2/, which is much smaller than that of a typical inductor-enhanced frequency divider. This divider operates with a supply voltage in the range from 1.8 to 0.7V, and attains minimum power consumption of 44 /spl mu/W, in which case the supply voltage is 0.7 V, the maximum operating frequency is 4.3 GHz, and the locking range is 2.3 GHz. A derivation of the frequency locking range of the divider is provided in the Appendix.     

Modified Wilkinson power divider for nth harmonic suppression

This paper presents a structure of the Wilkinson power divider that can suppress the nth harmonic output. The power divider consists of two /spl lambda//4n open stubs, which are located at the center of /spl lambda//4 branches and a parallel connection of a resistor and an inductor, which shunts the output ports. Experimental results show that this power divider suppresses the third harmonic component to less than -40 dB, while maintaining the characteristics of a conventional Wilkinson power divider; featuring an equal power split, a simultaneous impedance matching at all ports and a good isolation between output ports. These results agree quite well with the simulation results.     

K-band monolithic InGaP-InGaAs DCFET amplifier using BCB coplanar waveguide technology

A K-band (20 GHz) monolithic amplifier was developed and fabricated by adopting a low-/spl kappa/ benzocyclobutene (BCB) coplanar waveguide (CPW) line and InGaP-InGaAs doped-channel HFETs (DCFETs). This monolithic microwave integrated circuit (MMIC) utilizes a high impedance BCB CPW microstrip line (Z/sub 0/=70 /spl Omega/) for the biasing circuits, and a Z/sub 0/=50 /spl Omega/ line for the RF signal transmission. The low dielectric constant characteristic of the BCB interlayer is beneficial for a common-ground bridge process, which reduces the parasitics. The calculated loss tan/spl delta/ is 0.036 for the BCB at 20 GHz. The one-stage MMIC amplifier achieves an S/sub 21/ of 5 dB at 20 GHz, which is the first demonstration of the K-band InGaP-InGaAs DCFET monolithic circuit.     

Taper transmission line UWB Wilkinson power divider analysis and design

This paper proposed, analysed and fabricated an ultra-wideband Wilkinson power divider. This proposed power divider contains two parts, namely the transmission lines with fixed characteristic impedance and the tapered transmission line.

The power divider has a fixed architecture with the ability to broaden for different bandwidths by changing its circuit parameters including resistors and impedances. It also can create a bandwidth of about 40 GHz with a smaller physical dimension and fewer numbers of resistors.

The proposed power divider is investigated using the even/odd analysis method in order to compute equations required for designing power divider.

The proposed power divider was designed and fabricated for the 3-11 GHz ultra-wideband range. Then, the results are compared with the simulated results and a good agreement is obtained consequently. Furthermore, input return loss better than 12dB, output return loss better than 15dB, insertion loss better than 4.8dB and output ports isolation less than 12 dB are achieved by measured results. The overall size of the proposed power divider is 14.2 × 4.8 mm².     

On-chip crosstalk mitigation for densely packed differential striplines using via fence enclosures

The measured crosstalk characteristics for close-packed via fence enclosed differential stripline structures in a standard digital CMOS process are reported. The transmission lines achieve a packing pitch of 16 /spl mu/m of interconnect width per differential pair. The nearest neighbour far-end differential crosstalk is measured to be better than -43 dB and the near-end differential crosstalk is better than -37 dB below the drive signal at frequencies up to 20 GHz for 600 /spl mu/m lines. This is sufficient for use in high-density, high-speed analogue and digital integrated circuits.     

Design of Millimeter-Wave Power Divider with Coupled Line

A novel 35GHz 3dB power divider using coupled transmission line is presented. Unlike conventional Wilkinson divider circuit, only the 50 Ω transmission lines are used in the design. The impedance matching can be achieved by coupled transmission line even mode characteristic impedance. The predicated and measured performances agree well.     

A Parallel-Strip Ring Power Divider With High Isolation and Arbitrary Power-Dividing Ratio

In this paper, a new power divider concept, which provides high flexibility of transmission line characteristic impedance and port impedance, is proposed. This power divider is implemented on a parallel-strip line, which is a balanced transmission line. By implementing the advantages and uniqueness of the parallel-strip line, the divider outperforms the conventional divider in terms of isolation bandwidths. A swap structure of the two lines of the parallel-strip line is employed in this design, which is critical for the isolation enhancements. A lumped-circuit model of the parallel-strip swap including all parasitic effects has been analyzed. An equal power divider with center frequency of 2 GHz was designed to demonstrate the idea. The experimental results show that the equal power divider has 96.5% -10-dB impedance bandwidth with more than 25-dB isolation and less than 0.7-dB insertion loss. In order to generalize the concept with an arbitrary power ratio, we also realize unequal power dividers with the same isolation characteristics. The impedance bandwidth of the proposed power divider will increase with the dividing ratio, which is opposite to the conventional Wilkinson power divider. Unequal dividers with dividing ratios of 1 : 2 and 1 : 12 are designed and measured. Additionally, a frequency independent 180 power divider has been realized with less than 2 phase errors.     

CPW无空气桥功分器设计及其在阵列天线中的应用

针对传统微带圆极化阵列天线存在带宽较窄、尺寸较大等问题,提出一种新颖的基于共面波导(CPW)槽线转换结构的无空气桥功分器,并基于此功分器设计了一款紧凑型高定向性圆极化阵列天线。设计的共面波导功分器利用共面波导奇模式方法实现了能量分配,不需使用空气桥结构及四分之一波长匹配线,因此尺寸更加紧凑,结构更加简单。利用此功分器设计的圆极化阵列天线剖面厚度仅为1 mm,轴比带宽为4.14%,阻抗带宽为7.03%;在5.8 GHz时,实测增益为8.412 dBi,在保证低剖面、小尺寸的同时,可提供足够的工作带宽以及天线增益。     

Single-pole double-throw CMOS switches for 900-MHz and 2.4-GHz applications on p/sup -/silicon substrates

A 900-MHz single-pole double-throw (SPDT) switch with an insertion loss of 0.5 dB and a 2.4-GHz SPDT switch with an insertion loss of 0.8 dB were implemented using 3.3-V 0.35-/spl mu/m NMOS transistors in a 0.18-/spl mu/m bulk CMOS process utilizing 20-/spl Omega//spl middot/cm p/sup -/ substrates. Impedance transformation was used to reduce the source and load impedances seen by the switch to increase the power handling capability. SPDT switches with 30-/spl Omega/ impedance transformation networks exhibit 0.97-dB insertion loss and 24.3-dBm output P/sub 1dB/ when tuned for 900-MHz operation, and 1.10-dB insertion loss and 20.6-dBm output P/sub 1dB/ when tuned for 2.4-GHz operation. The 2.4-GHz switch is the first bulk CMOS switch which can be used for 802.11b wireless local area network applications.     

Gain-flattened Er/sup 3+/-doped fiber amplifier for a WDM signal in the 1.57-1.60-/spl mu/m wavelength region

A gain-flattened Er/sup 3+/-doped silica-based fiber amplifier (EDFA) has been constructed for a 1.58-/spl mu/m band WDM signal. This EDFA exhibits uniform amplification characteristics with a gain excursion of 0.9 dB for a four-channel WDM signal in the 1.57-1.60 /spl mu/m wavelength region. The average signal gain and the noise figure for the WDM signal are 29.5 dB and less than 6.3 dB, respectively. The use of this EDFA in parallel with a 1.55-/spl mu/m band EDFA will expand the WDM transmission wavelength region.     

Controllability of novel Sn/sub 0.95/Au/sub 0.05/ microbumps using interlaminated tin and gold layers for flip-chip interconnection

A flip-chip interconnection technology using novel lead-free solder microbumps with a balling temperature as low as 220 /spl deg/C is presented. Controllability of newly developed Sn/sub 0.95/Au/sub 0.05/ microbumps has been examined experimentally. By varying the bump volume and the diameter of the wettable bump electrodes, Sn/sub 0.95/Au/sub 0.05/ microbumps with heights from 11 /spl mu/m to 37 /spl mu/m were successfully fabricated with a standard deviation of 1.5 /spl mu/m. The deviation of on-chip CPW impedance from 50 /spl Omega/ was lower than 10% for nonmetallization motherboard. The smaller bumps exhibited a better performance since the degradation of reflection properties is ascribed to the bump capacitance, which was estimated 10-20 fF. Because of high process yield and good performance, the flip-chip bonding using Sn/sub 0.95/Au/sub 0.05/ microbumps of the order of 20 /spl mu/m in height may be advantageous for W-band interconnection of InP- or GaAs-based devices.     

集总元件宽带Wilkinson功分器的研究

提出了一种集总元件宽带Wilkinson功分器的分析及设计方法。从功分器的奇偶模阻抗理论分析出发,将功分器设计转化为在偶模下求解阻抗比为2:1的宽带阻抗变换和在奇模下求解宽带阻抗匹配的问题,采用LC阻抗变换节取代传统电路的λ/4传输线,减小功分器体积,并推导出两级功分器的元件解算公式。经ADS仿真验证,由解算公式得到的两级功分器,在760～1240MHz的带宽内功率分配损耗小于0.1dB,隔离度大于20dB,输入输出端口反射系数均小于-20dB,可用带宽fH/fL为1.64,实现了Wilkinson功分器小尺寸、带宽大的优点。     

Efficient PDFA module using high-NA PbF/sub 2//InF/sub 3/-based fluoride fiber

The highest reported single-pass gain coefficient of 0.36 dB/mW has been achieved using a newly developed Pr/sup 3+/-doped high-NA PbF/sub 2//InF/sub 3/-based fluoride fiber, with a /spl Delta/n of 6.6%, a core diameter of 1.2 /spl mu/m and a transmission loss of 250 dB/km at 1.2 /spl mu/m. This fiber was used to construct an efficient PDFA module with a MOPA-LD. A small-signal net gain of 22.5 dB was achieved at 1.30 /spl mu/m with a pump power of 23m mW.     

Low-voltage high-gain differential OTA for SC circuits

A new differential operational transconductance amplifier (OTA) for SC circuits that operates with a supply voltage of less than two transistor threshold voltages is presented. Its simplicity relies on the use of a low-voltage regulated cascode circuit, which achieves very high output impedance under low-voltage restrictions. The OTA has been designed to operate with a supply voltage of V/sub DD/=1.5 V, using a 0.6 /spl mu/m CMOS technology with transistor threshold voltages of V/sub TN/=0.75 V and V/sub TP/=-0.85 V. Post-layout simulation results for a load capacitance (C/sub L/) of 2 pF show a 75 MHz gain-bandwidth product and 100 dB DC gain with a quiescent power consumption of 750 /spl mu/W.