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1.
Early predictions that diamond would be a suitable material for high performance, high power devices were not supported by the characteristics of diodes and field effect transistors (FETs) fabricated on boron doped (p-type) thin film material. In this paper commercially accessible polycrystalline thin film diamond has been turned p-type by the incorporation of near surface hydrogen; mobility values as high as 70 cm2 V−1 s−1 have been measured for films with a carrier concentration of 5×1017 cm−3. Schottky diodes and metal–semiconductor FETs (MESFETs) have been fabricated using this approach which display unprecedented performance levels; diodes with a rectification ratio >106, leakage currents <1 nA, no indication of reverse bias breakdown at 100 V and an ideality factor of 1.1 have been made. Simple MESFET structures that are capable of switching VDS values of 100 V with low leakage and current saturation (pinch-off) characteristics have also been fabricated. Predictions based upon experiments performed on these devices suggest that optimised device structures will be capable of operation at power levels up to 20 W mm−1, implying that thin film diamond may after all be an interesting material for power applications.  相似文献   

2.
In this paper, we present high integrity thin oxides grown on the channel implanted substrate (3 × 1017 cm−3) and heavily doped substrate (1 × 1020 cm−3) by using a low-temperature wafer loading and N2 pre-annealing process. The presented thin oxide grown on the channel implanted substrate exhibits a very low interface state density (1 × 1010 cm−2 eV−1) and a very high intrinsic dielectric breakdown field (15 MV/cm). It also shows a lower charge trapping rate and interface state generation rate than the conventional thermal oxide. For the thin oxide grown on the heavily-doped substrate by using the proposed recipe, the implantation-induced damage close to the silicon surface can be almost annealed out. The presented heavily-doped oxide shows much better dielectric characteristics, such as the dielectric breakdown field and the charge-to-breakdown, as compared to the conventional heavily-doped oxide.  相似文献   

3.
A new method which can nondestructively measure the surface-state density (SSD) Ds and estimate the capture cross-sections (CCS) of surface state σ0n and σp on surface of p-type semiconductor crystals is proposed. This method is based on the photovoltage measurements at various temperatures. The photovoltage experiment was carried out with a (1 1 1) p-type Si single crystal (NA=4.8×1014 cm −3). Owing to that the surface barrier height φBP=0.6421 V and the surface-recombination velocity sn=9.6×103 cm s−1 of this sample can be determined, the SSD Ds=1.2×1011 cm−2 eV−1 can therefore be obtained, furthermore CCS σ0n≈5×10−14 cm2 and σp≈2×10−10 cm2 can also be estimated. These results are consistent with that of related reports obtained by other methods.  相似文献   

4.
The gate bias polarity dependence of charge trapping and time-dependent dielectric breakdown (TDDB) in nitrided and reoxidized nitrided silicon dioxides prepared by rapid thermal processing (RTP) is reported. Charge trapping during high-field injection can be reduced by rapid thermal nitridation for both substrate and gate injection. While reoxidation of nitrided oxides shows further reduction in charge trapping for substrate injection, degradation is observed for gate injection. Similar effects are observed for TDDB: reoxidized nitrided oxides show charge-to-breakdown in excess of 300 C/cm2 for substrate injection, but less than 30 C/cm2 for gate injection. These effects are related to the nitrogen and hydrogen profiles in the oxides. By tailoring the process conditions, a symmetric behavior of NO and RONO films with low charge trappings and Q BD in excess of 50 C/cm2 is possible, making them attractive as long-lifetime dielectrics from EEPROM (electrically erasable programmable ROM) and flash EEPROM technologies  相似文献   

5.
By measuring the ramp voltage I–V characteristics, we obtained the oxide trap density and capture cross-section for (O2 + HCl) dry oxidized samples in the temperature range 900–1100°C. It was found that the oxide trap density increases with an increase in the oxidation temperature. The activation energy of oxide trap incorporation is of the order of 4 eV. The capture cross-section determined for the oxide traps is of the order of 10−14 cm2.  相似文献   

6.
X-band performance, high temperature D.C. operation and uniformity have been evaluated for 1 μm gate AlGaN/GaN HEMTs grown by RF atomic nitrogen plasma MBE. Deposition and fabrication were performed on 2-inch (0001) sapphire substrates to determine process uniformity. HEMTs with 300 μm total gate width and dual gate finger geometry have been fabricated with 650–700 cm2 V−1×s mobility. Maximum frequency cut-offs on the order of 8–10 GHz were achieved. D.C. performance at room temperature was >500 mA mm−1, and external transconductance was >70 mS mm−1. The transistors operated at test temperatures of 425°C in air.  相似文献   

7.
Growth of ultrathin (<100 Å) oxynitride on strained-Si using microwave N2O and NH3 plasma is reported. X-ray photoelectron spectroscopy (XPS) results indicate a nitrogen-rich layer at the strained-Si/SiO2 interface. The electrical properties of oxynitrides have been characterized using a metal-insulator-semiconductor (MIS) structure. A moderately low value of insulator charge density (6.1×1010 cm-2) has been obtained for NH3 plasma treated N2O oxide sample. Nitrided oxide shows a larger breakdown voltage and an improved charge trapping properties under Fowler-Nordheim (F-N) constant current stress  相似文献   

8.
GaAs P-i-N layers with an i-region net doping of less than 1012 cm−3 were grown on P+ and N+ substrates by a modified liquid phase epitaxy (LPE) method. Doping profiles and structural data obtained by varius characterization techniques are presented and discussed. A P+-P-i-N-N+ diode with a 25 μm-wide i-region exhibits a breakdown voltage of 1000 V, a trr of 50 ns, and reverse current densities (at VR = 800 V) of − 3 × 10−6 A/cm2 at 25°C and 10−2 A/cm2 at 260° C.  相似文献   

9.
The dielectric constant and the leakage current density of (Ba, Sr)TiO3 (BST) thin films deposited on various bottom electrode materials (Pt, Ir, IrO2/Ir, Ru, RuO2/Ru) before and after annealing in O2 ambient were investigated. The improvement of crystallinity of BST films deposited on various bottom electrodes was observed after the postannealing process. The dielectric constant and leakage current of the films mere also strongly dependent on the postannealing conditions. BST thin film deposited on Ir bottom electrode at 500°C, after 700°C annealing in O2 for 20 min, has the dielectric constant of 593, a loss tangent of 0.019 at 100 kHz, a leakage current density of 1.9×10 -8 A/cm2 at an electric field of 200 kV/cm with a delay time of 30 s, and a charge storage density of 53 fC/μm2 at an applied field of 100 kV/cm. The BST films deposited on Ir with post-annealing can obtain better dielectric properties than on other bottom electrodes in our experiments. And Ru electrode is unstable because the interdiffusion of Ru and Ti occurs at the interface between the BST and Ru after postannealing. The ten year lifetime of time-dependent dielectric breakdown (TDDB) studies indicate that BST on Pt, Ir, IrO2/Ir, Ru, and RuO2/Ru have long lifetimes over ten gears on operation at the voltage bias of 2 V  相似文献   

10.
The current–voltage characteristics of GaAs/InxGa1−xAs/AlAs resonant tunneling diodes (RTDs) are a function of stress, and the current–voltage changes of RTDs with stress are attributed to the piezoresistive effect in RTDs. In order to study the piezoresistive effect in RTDs for application in micromachined mechanical sensors, the beam-mass structure based on RTDs is designed, fabricated and tested by the Wheatstone bridge test circuit. The test results show that the piezoresistive sensitivity of RTDs can be adjusted through the bias voltage, and the maximal piezoresistive sensitivity of RTDs with bias voltage at 0.618 V is 7.61×10−11 Pa−1, which is two orders higher than the minimal piezoresistive sensitivity (2.03×10−13 Pa−1) of RTDs with bias voltage at 0.656 V, and is also higher than the piezoresistive sensitivity of silicon material (5.52×10−11 Pa−1).  相似文献   

11.
Currently, large-area 3C–SiC films are available from a number of sources and it is imperative that stable high temperature contacts be developed for high power devices on these films. By comparing the existing data in the literature, we demonstrate that the contact behavior on each of the different polytypes of SiC will vary significantly. In particular, we demonstrate this for 6H–SiC and 3C–SiC. The interface slope parameter, S, which is a measure of the Fermi-level pinning in each system varies between 0.4–0.5 on 6H–SiC, while it is 0.6 on 3C–SiC. This implies that the barrier heights of contacts to 3C–SiC will vary more significantly with the choice of metal than for 6H–SiC. Aluminum, nickel and tungsten were deposited on 3C–SiC films and their specific contact resistance measured using the circular TLM method. High temperature measurements (up to 400°C) were performed to determine the behavior of these contacts at operational temperatures. Aluminum was used primarily as a baseline for comparison since it melts at 660°C and cannot be used for very high temperature contacts. The specific contact resistance (ρc) for nickel at room temperature was 5×10−4 Ω cm2, but increased with temperature to a value of 1.5×10−3 Ω cm2 at 400°C. Tungsten had a higher room temperature ρc of 2×10−3 Ω cm2, which remained relatively constant with increasing temperature up to 400°C. This is related to the fact that there is hardly any reaction between tungsten and silicon carbide even up to 900°C, whereas nickel almost completely reacts with SiC by that temperature. Contact resistance measurements were also performed on samples that were annealed at 500°C.  相似文献   

12.
High current bulk GaN Schottky rectifiers   总被引:2,自引:0,他引:2  
GaN Schottky rectifiers employing guard-ring and SiO2 edge termination show almost ideal forward current characteristics, with ideality factor 1.08 and specific on-state resistance as low as 2.6×10−3 Ω cm2. A maximum forward current of 1.72 A at 6.28 V was achieved under pulsed (10% duty cycle) conditions. The reverse breakdown voltage was inversely dependent on rectifier area. The presence of defects in the GaN still dominates the reverse leakage, with both field emission and thermionic field emission contributions present. The parallel-plane breakdown voltage is never reached, even with the use of multiple edge termination methods, but the results show the promise of GaN rectifiers for power conditioning and electric utility applications.  相似文献   

13.
Electrical and reliability properties of ultrathin La2O 3 gate dielectric have been investigated. The measured capacitance of 33 Å La2O3 gate dielectric is 7.2 μF/cm2 that gives an effective K value of 27 and an equivalent oxide thickness of 4.8 Å. Good dielectric integrity is evidenced from the low leakage current density of 0.06 A/cm2 at -1 V, high effective breakdown field of 13.5 MV/cm, low interface-trap density of 3×1010 eV-1/cm2, and excellent reliability with more than 10 years lifetime even at 2 V bias. In addition to high K, these dielectric properties are very close to conventional thermal SiO2   相似文献   

14.
Low Weibull slope of breakdown distributions in high-k layers   总被引:1,自引:0,他引:1  
The reliability of various Al2O3, ZrO2 and Al2O3/ZrO2 double layers with a physical oxide thickness from 3 nm to 15 nm and TiN gate electrodes was studied by measuring time-to-breakdown using gate injection and constant voltage stress. The extracted Weibull slope β of the breakdown distribution is found to be below 2 and shows no obvious thickness dependence. These findings deviate from previous results on intrinsic breakdown in SiO2, where a strong thickness dependence was explained by the percolation model. Although promising performance on devices with high-k layers as dielectric can be obtained, it is argued that gate oxide reliability is likely limited by extrinsic factors  相似文献   

15.
Deposition and electrical properties of high dielectric constant (high-k) ultrathin ZrO2 films on tensilely strained silicon (strained-Si) substrate are reported. ZrO2 thin films have been deposited using a microwave plasma enhanced chemical vapor deposition technique at a low temperature (150 °C). Metal insulator semiconductor (MIS) structures are used for high frequency capacitance–voltage (CV), current–voltage (IV), and conductance–voltage (GV) characterization. Using MIS capacitor structures, the reliability and the leakage current characteristics have been studied both at room and high temperature. Schottky conduction mechanism is found to dominate the current conduction at a high temperature. Observed good electrical and reliability properties suggest the suitability of deposited ZrO2 thin films as an alternative as gate dielectrics. Compatibility of ZrO2 as a gate dielectric on strained-Si is shown.  相似文献   

16.
Mo, Pt, Pt/Mo and Pt/Ti thin films have been deposited onto Si and SiO2 substrates by RF sputtering and annealed in the YBa2Cu3O7−δ (YBCO) growth conditions. The effect of annealing on the sheet resistance of unpatterned layers was measured. A Pt-based multilayered metallization for the PMOS devices was proposed and tested for a compatible monolithic integration of semiconducting devices and YBCO sensors on the same silicon substrate. The best results were obtained with a Pt/Ti/Mo-silicide structure showing 0.472 Ω interconnect sheet resistivity and 2×10−4 Ω cm2 specific contact resistivity after annealing for 60 min at 700 °C in 0.5 mbar O2 pressure.  相似文献   

17.
A new methodology to optimize the design of floating ring (FR) termination technique for high voltage device is presented. The basic idea is to simulate the blocking capability of the structure with only one guard ring and then extend the results to a multiple FR system. A second advantage of our method is to include the ring width in the optimization process. The effectiveness and efficiency of our methodology is illustrated by optimizing a FR structure with a junction depth xj=5 μm and Si substrate doping 2·1014 cm−3. A seven rings structure is optimized giving 85% efficiency in respect to the ideal plane parallel junction breakdown voltage VBD=840 V. The simulation results are generated by the user-oriented simulation program POWER2D for studying the voltage handling capability of arbitrary shaped power semiconductor devices. A special algorithm is implemented ensuring very fast and automatic search of the breakdown via the ionization integrals calculus. An efficient numerical algorithm to drastically reduce the number of iterations when adjusting the quasi-Fermi potential of the floating rings has also been developped  相似文献   

18.
Yip  L.S. Shih  I. 《Electronics letters》1988,24(20):1287-1289
Films of yttrium oxide (Y2O3) were deposited on Si substrates from a Y2O3 target by RF magnetron sputtering. MIS capacitors in the form of Al and Y2O3 (400 Å)-Si were then fabricated. The leakage current density was about 10-6 A/cm2 at 1.3×106 V/cm, and the breakdown field of the films was about 2.75×106 V/cm. The dielectric constant of the sputtered Y2O3 was found to be about 12-12.7  相似文献   

19.
28Si+ implantation into Mg-doped GaN, followed by thermal annealing in N2 was performed to achieve n+-GaN layers. The carrier concentrations of the films changed from 3×1017 (p-type) to 5×1019 cm−3 (n-type) when the Si-implanted p-type GaN was properly annealed. Specific contact resistance (ρc) of Ti/Al/Pt/Au Ohmic contact to n-GaN, formed by 28Si+ implantation into p-type GaN, was also evaluated by transmission line model. It was found that we could achieve a ρc value as low as 1.5×10−6 Ω cm2 when the metal contact was alloyed in N2 ambience at 600 °C. Si-implanted GaN p–n junction light-emitting diodes were also fabricated. Electroluminescence measurements showed that two emission peaks at around 385 and 420 nm were observed, which could be attributed to the near band-edge transition and donor-to-acceptor transition, respectively.  相似文献   

20.
Passivation of GaAs surfaces was achieved by the deposition of Ge3N4 dielectric films at low temperatures. Electrical characteristics of MIS devices were measured to determine the interface parameters. From C-V-f and G-V-f measurements, density of interface states has been obtained as (4–6)×1011 cm−2 eV−1 at the semiconductor mid-gap. Some inversion charge buildup was seen in the C-V plot although the strong inversion regime is absent. Thermally stimulated current measurements indicate a trap density of 5×1018−1019 cm−3 in the dielectric film, with their energy level at 0.59 eV.  相似文献   

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