Numerical modeling of ZnSnO/CZTS based solar cells

Numerical simulation has been performed to improve the performance of Cu2ZnSnS4 (CZTS) solar cells by replacing CdS with Zn1–xSnxO buffer layer. The influences of thickness, donor concentration and defect density of buffer layers on the performance of CZTS solar cells were investigated. It has been found that Zn1–xSnxO buffer layer for Sn content of 0.20 is better for CZTS solar cell. A higher efficiency can be achieved with thinner buffer layer. The optimized solar cell demonstrated a maximum power conversion efficiency of 13%.     

Influence of Cu_xS back contact on CdTe thin film solar cells

We present a detailed study on CuxS polycrystalline thin films prepared by chemical bath method and utilized as back contact material for CdTe solar cells.The characteristics of the films deposited on Si-substrate are studied by XRD.The results show that as-deposited CuxS thin film is in an amorphous phase while after annealing,samples are in polycrystalline phases with increasing temperature.The thickness of CuxS thin films has great impact on the performance of CdS/CdTe solar cells.When the thickness of the film is about 75 nm the performance of CdS/CdTe thin film solar cells is found to be the best.The energy conversion efficiency can be higher than 12.19%,the filling factor is higher than 68.82% and the open-circuit voltage is more than 820 mV.     

电力静电感应晶体管大电压特性的改善

A novel structure for designing and fabricating a power static induction transistor（SIT）with excellent high breakdown voltage performance is presented.The active region of the device is designed to be surrounded by a deep trench to cut off the various probable parasitical effects that may degrade the device performance,and to avoid the parallel-current effect in particular.Three ring-shape junctions（RSJ）are arranged around the gate junction to reduce the electric field intensity.It is important to achieve maximum gate–source breakdown voltage BVGS, gate–drain breakdown voltage BVGD and blocking voltage for high power application.A number of technological methods to increase BVGD and BVGS are presented.The BVGS of the power SIT has been increased to 110 V from a previous value of 50–60 V,and the performance of the power SIT has been greatly improved.The optimal distance between two adjacent ring-shape junctions and the trench depth for the maximum BVGS of the structure are also presented.     

Performance of Object Classification Using Zernike Moment

Moments have been used in all sorts of object classification systems based on image. There are lots of moments studied by many researchers in the area of object classification and one of the most preference moments is the Zernike moment. In this paper, the performance of object classification using the Zernike moment has been explored. The classifier based on neural networks has been used in this study. The results indicate the best performance in identifying the aggregate is at 91.4% with a ten orders of the Zernike moment. This encouraging result has shown that the Zernike moment is a suitable moment to be used as a feature of object classification systems.     

Modeling Impact of ROADM Intra-Node Add/Drop Contention on a Single Node Lightpath Blocking Performance

We propose an analytical model to evaluate the lightpath blocking performance for a single ROADM node with intra-node add/drop contention,in which the number of lightpaths that can be added/dropped with the same wavelength is limited by the add/drop contention factor.Different models of traffic load per nodal degree are considered to validate the effectiveness of the analytical model.The simulation results show that the proposed analytical model is effective in predicting the performance for different values of add/drop contention factor C and for variable offered loads at the node.The add/drop contention factor shows an important impact on the lightpath blocking performance and properly raising the contention factor can significantly improve the lightpath blocking performance.When the add/drop contention factor C exceeds a certain level,the performance of a ROADM with intra-node contention is close to that of a contentionless ROADM.     

可用于高密度高速度领域的一种新型两端静态存储单元的设计

A vertical two-terminal silicon PNPN diode is presented for use in a high-density memory cell. The device design for high-speed operations was studied with experiments and calibrated simulations, which proves that the proposed memory cell can be operated at nanosecond range. The static and dynamic power dissipations were also studied, which indicated the availability of the proposed memory cell for VLS1 applications. Moreover, the memory cell is compatible with CMOS process, has little impact from process variation, and has good reliability.     

A Novel Event Model for Performance Analysis of IEEE 802.11 DCF

After considering the memory effect among series events occurring on the channel, we propose a novel event model to analyze the channel status more precisely. The memory effect is caused by the backoff freezing regulation of IEEE 802.11 Distributed coordination function （DCF）, which has been ignored before and thus resulted in the inaccurate evaluation of the network performance. Based on our new event model, the network performance of IEEE 802.11 DCF, including throughput, packet delay distribution and energy efficiency is analyzed. Simulation results show that our model is highly accurate.     

一种适用于智能卡应用的RSA协处理器

Based on the microprocessor structure,an RSA coprocessor for improved Montgomery algorithm has been designed．The functional units of this coprocessor operate concurrently,and up to three instructions can be issued in one cycle．A mixed form of three-stage and two-stage pipelined structure is used for instruction execution,and the coprocessor and CPU core can share a common RAM memory through a set of switches under control．The structure of the coprocessor can be expanded to contain more than one multiplier-accumulator units for higher performance．     

化学抛光处理和低温退火对硅异质结太阳电池性能的影响

Amorphous/crystalline silicon heterostructure solar cells have been fabricated by hot wire chemical vapor deposition （HWCVD） on textured p-type substrates. The influence of chemical polish （CP） etching and the post annealing process on the solar cell performance have been studied. The CP treatment leads to a reduction of stress in the i-layer by the slight rounding of the pyramid peaks, therefore improving the deposition coverage and the contact by each layer, which is beneficial for the performance of the solar cells. An optimized etching time of 10-15 s has been obtained. A post annealing process leads to a considerably improved open voltage （Voc）, filled factor （FF）, and conversion efficiency （η） by restructuring the deposited film and reducing the series resistance. An efficiency of 15.14% is achieved that represents the highest result reported in China for an amorphous/crystalline heterostructure solar cells based on the textured p-type substrates.     

SiO2隧穿层不同气氛氮化退火对MONOS存储器性能的改善

Metal–oxide–nitride–oxide–silicon(MONOS)capacitorswiththermallygrownSiO2asthetunnellayer arefabricated,andtheeffectsofdifferentambientnitridation(NH3,NOandN2O)onthecharacteristicsofthememory capacitors are investigated.The experimental results indicate that the device with tunnel oxide annealed in NO ambient exhibits excellent memory characteristics,i.e.a large memory window,high program/erase speed,and good endurance and retention performance(the charge loss rate is 14.5%after 10 years).The mechanism involved isthatmuchmorenitrogenisincorporatedintothetunneloxideduringNOannealing,resultinginalowertunneling barrier height and smaller interface state density.Thus,there is a higher tunneling rate under a high electric field and a lower probability of trap-assisted tunneling during retention,as compared to N2O annealing.Furthermore,compared with the NH3-annealed device,no weak Si–H bonds and electron traps related to the hydrogen are introduced for the NO-annealed devices,giving a high-quality and high-reliability SiON tunneling layer and SiON/Si interface due to the suitable nitridation and oxidation roles of NO.     

Reducing the influence of STI on SONOS memory through optimizing added boron implantation technology

The influence of shallow trench isolation (STI) on a 90 nm polysilicon-oxide-nitride-oxide-silicon struc-ture non-volatile memory has been studied based on experiments. It has been found that the performance of edge memory cells adjacent to STI deteriorates remarkably. The compressive stress and boron segregation induced by STI are thought to be the main causes of this problem. In order to mitigate the STI impact, an added boron implantation in the STI region is developed as a new solution. Four kinds of boron implantation experiments have been implemented to evaluate the impact of STI on edge cells, respectively. The experimental results show that the performance of edge cells can be greatly improved through optimizing added boron implantation technology.     

Alternative boron precursors for BGaAs epitaxy

The organometallic vapor phase epitaxy growth of zinc-blende B_xGa_1−xAs and B_xGa_1−x−yIn_yAs with boron concentrations (x) up to 3–5% has recently been demonstrated using diborane as a boron precursor. Growth of these alloys using diborane is complicated by many factors, such as parasitic gas-phase reactions, highly temperature-dependent boron incorporation, and limited boron incorporation before the onset of structural breakdown. These factors suggest that diborane may not be the best precursor for the growth of these alloys. We compare the use of alternative boron precursors; trimethylboron (TMB), triethylboron (TEB), and boron trifluoride (BF₃), with diborane for the OMVPE growth of these boron containing III–V alloys. We find that TMB and BF₃ do not result in significant boron incorporation into GaAs. TEB does result in boron incorporation in a manner very similar to diborane. Both diborane and TEB incorporate more efficiently using triethylgallium (TEG) rather than trimethylgallium (TMG), making TEG a preferred source of gallium for BGaAs epitaxy. Using TEB together with TEG, a higher boron composition (x=4–7%) has been achieved than has been previously reported, but the complicating problems observed with diborane still exist.     

A shallow trench isolation using nitric oxide (NO)-annealed wall oxide to suppress inverse narrow width effect

A simple method to suppress INWE of transistor based on STI technology has been demonstrated in this paper. In order to prevent the boron out-diffusion through the trench sidewall, the nitric oxide (NO)-annealed wall oxidation is performed before the gap-filling process. By reviewing the electrical properties of n- and p-MOSTs, it has been confirmed that INWE of n-MOST can be easily suppressed without any problem in p-MOST, and the uniformity of parameter can be remarkably improved by this method. Also, the gate oxide integrity and the junction leakage current have been evaluated in the device reliability point of view, and it is confirmed that there are no problems to use this technique in STI technology.     

Grain growth mechanism in boron doped polycrystalline silicon

The mechanism of grain growth in heavily boron doped polycrystalline silicon has been studied for various boron concentrations, annealing times and annealing temperatures by proposing a kinetic model based on thermodynamical concepts. A computer simulation technique has been used to determine the grain boundary self-diffusion of silicon atoms. Our theoretical predictions have been compared with available experimental reports. This model has been extended to evaluate the grain size distribution in boron doped polysilicon for various dopant concentrations, annealing times and temperatures. The results are discussed in detail.     

Building Functional Memories and Logic Circuits with 2D Boron Nitride

The fast development of synthesis routes and preparation technology of 2D materials has motivated a rapid growth in the micro- and nanoelectronic memory devices, which gives rise to the breakthroughs in the semiconductor research area. Hexagon boron nitride (h-BN) with excellent chemical, mechanical, and optical properties has been proven to have potential in overcoming the scaling limit to nanometer, and even sub-nanometer lengths to replace the use of thick and stiff blocking dielectrics in two-terminal or three-terminal devices. The use of atomically thin h-BN or h-BN van der Waals heterostructures (vdWhs) can improve the reliability, capability, and functionality of memory devices. This is an encouraging strategy toward high-density on-chip integrated circuits, which has recently earned considerable interest. While the research in h-BN material properties and characterization is comprehensively verified, specified mechanisms of resistive switching have not been analyzed in-depth. Moreover, recent concern about novel structure design and expanding applications in electronics, optoelectronics, and spintronics has arisen. In this review, recent progress in h-BN memories with volatile or nonvolatile properties is presented, expanding the memories to functional applications, and further challenges of the development of h-BN-based memories and logic circuits are discussed.     

Electronic properties of boron in p-type bulk 6H-SiC

The electronic properties of boron in bulk 6H-SiC have been studied by temperature dependent Hall effect, thermal admittance spectroscopy, and optical absorption. A single acceptor level located between 0.27 and 0.35 eV above the valence band is associated with boron on a silicon lattice site. The deep nature of this acceptor level prevents complete thermal activation of the level at room temperature and thus carrier concentration measurements at this temperature will not give the total boron concentration. A spread in the measured activation energy for boron is reported. Measurement of optical absorption is suggested as a nondestructive measure of boron concentration. No evidence for the D-center was observed in this material.     

Room-Temperature Metal-Catalyzed Ultrafast Gasification of Ultrathin Boron Flakes

The trivalent outer shell of boron renders this element electron-poor but chemically rich, exhibiting more than one dozen allotropes. Its 2D polymorph has been recently synthesized on metal substrates under ultrahigh vacuum and has attracted intense interest. However, probing its properties ex situ has been challenging due to the quality degradation—surface oxidation—that occurs upon exposure to ambient environments. Herein, this surface chemistry is investigated in regard to the air stability of ultrathin boron flakes on metals prepared by atmospheric-pressure chemical vapor deposition. The characteristic Volmer–Weber growth is recognized by the stacking of polygon-shaped, thin flakes as isolated islands. Significantly, the metal-catalyzed, ultrafast gasification of boron flakes at room temperature, exemplified by the complete, spontaneous vanishment of 200 nm-thick boron islands in 3 h is observed. A two-step mechanism, first oxygen-involved surface oxidation and then subsequent reactions with water forming a highly volatile boric acid layer, is unambiguously revealed by combined surface characterizations. The catalysis by metal substrates, corroborated by theoretical calculations, is attributed as the crucial cause of the unprecedented gasification. The concept of oxygen-free growth is thereby proposed for air-sensitive material growth by introducing in situ oxygen scavengers. These findings significantly expand the fundamental understanding of the surface chemistry of boron and pave the way for the chemical vapor deposition growth of hydrophobic materials.     

Hexagonal Boron Nitride Thin Film for Flexible Resistive Memory Applications

Hexagonal boron nitride (hBN), which is a 2D layered dielectric material, sometimes referred as “white graphene” due to its structural similarity with graphene, has attracted much attention due to its fascinating physical properties. Here, for the first time the use of chemical vapor deposition ‐grown hBN films to fabricate ultrathin (≈3 nm) flexible hBN‐based resistive switching memory device is reported, and the switching mechanism through conductive atomic force microscopy and ex situ transmission electron microscopy is studied. The hBN‐based resistive memory exhibits reproducible switching endurance, long retention time, and the capability to operate under extreme bending conditions. Contrary to the conventional electrochemical metallization theory, the conductive filament is found to commence its growth from the anode to cathode. This work provides an important step for broadening and deepening the understanding on the switching mechanism in filament‐based resistive memories and propels the 2D material application in the resistive memory in future computing systems.     

Radiation-induced shallow trench isolation leakage in 180-nm flash memory technology

The effects of total ionizing dose (TID) irradiation on the inter-device and intra-device leakage current in a 180-nm flash memory technology are investigated. The positive oxide trapped charge in the shallow trench isolation (STI) oxide is responsible for the punch-through leakage increase and punch-through voltage decrease. Nonuniform radiation-induced oxide trapped charge distribution along the STI sidewall is introduced to analyze the radiation responses of input/output (I/O) device and high voltage (HV) device. At low dose level, the inversion near the STI corner caused by the trapped charge occurs more easily due to the lower doping concentration in this region, which gives rise to the subthreshold hump effect. With total dose level increase, more charge at deep region of the STI oxide is accumulated, predominating the intra-device off-state leakage current. It has been discussed that the STI corner scheme and substrate doping profile play important roles on influencing the device’s performance after radiation.     

Molecular beam epitaxial growth of BGaAs ternary compounds

B_xGa_1−xAs ternary compounds with boron compositions varying up to x=1% have been grown by molecular beam epitaxy. Reflection high energy electron diffraction and double crystal x-ray diffraction measurements show that grown layers are single crystal with boron composition up to 0.25% and exhibit specular surface morphology. Photoluminescence measurements indicated a monotonic increase in energy bandgap with boron composition up to 0.25%. The layers showed p-type conductivity with hole concentration reaching the low 10¹⁹ cm⁻³ range. Increasing boron concentrations leads to rough surface morphology and reduction in photoluminescence intensity. Initial results indicate that lower growth temperature may be useful for increasing boron incorporation in BGaAs compounds.