微机械陀螺传感器模型与接口电路的混合模拟

根据微机械陀螺的动力学方程建立了组合微机械陀螺振动特性和电学特性的传感器等效电路模型 ,并通过电路模拟工具 PSPICE对模型进行验证。利用该模型与接口电路的混合模拟 ,可以分析陀螺整个系统的工作性能。模拟分析的结果验证了该模型可以应用于微机械陀螺接口电路的设计和优化     

微机械音叉陀螺外围电路研究及仿真

介绍一种微机械音叉陀螺外围电路的基本结构及各组成部分的工作原理。针对机械敏感单元设计了陀螺的外围电路，通过系统分析，建立了数学模型，并利用Matlab对整个模型进行行为级仿真，验证所设计电路的可行性。仿真结果为电路的设计、调试提供了有利的分析方法和手段，具有一定指导意义。     

微机械陀螺振动特性的等效电学模拟

根据微机械陀螺的动力学方程建立其振动特性的等效电路模型,该模型用电路模拟工具PSPICE实现。利用这个电路模型,可以分析陀螺的振动特性,包括检测振动的瞬态响应和稳态响应,检测振动对输入角速度的频率响应特性,从而可以获得陀螺工作的优化条件;并为传感器与接口电路的整体模拟打下基础。     

适用于数字锁相环的快速建模方法

为解决数字锁相环基于晶体管级仿真速度慢的问题,提出一种适用于数字锁相环的快速高精度建模方法。该方法直接利用数字模块的设计代码作为输入的仿真文件,并根据Spice仿真结果用Verilog-A对模拟模块进行建模。由于Verilog设计代码能够准确的描述数字模块性能,而Verilog-A模型对模拟模块的各种电路特性都能准确模拟,因此该模型的仿真精度非常高。最终以一种数字锁相环结构为例建立数模混合模型进行仿真,验证了该设计方法的可行性和有效性。     

电容式z轴微机械陀螺的噪声抑制

将z轴微机械陀螺两个模态的机械噪声效应等效为各自在单位噪声力作用下的振动,根据陀螺的工作原理得到两个噪声力作用下陀螺敏感模态的机械输出噪声。建立了包含运放和电路板非理想因素在内的接口电路的噪声模型。结合机械噪声模型和接口电路模型噪声,建立了包括结构参数和电路最小检测电容量在内的陀螺的噪声等效输入角速度模型,为陀螺的设计优化提供了参考。分析了结构参数对陀螺等效输入角速度噪声影响,并采用两个参数不同的电容式z轴微机械陀螺进行了实验。结果表明,通过结构参数的调整,将电容式z轴微机械陀螺的输出噪声从414μV/Hz降低至235μV/Hz。     

一种新颖的z轴硅微陀螺仪信号检测方案研究

硅微陀螺仪具有体积小、功耗低、可靠性高等优点,在惯性测量领域有着广泛的应用前景。为了提高陀螺仪测量的灵敏度和信噪比,提出了一种新颖的信号检测方案。该方案研究了硅微陀螺仪驱动模态、检测模态的动力学方程,建立了陀螺仪等效力学模型,观察陀螺仪的动态特性,探讨硅微陀螺仪信号检测方法,并对陀螺仪的机械结构及检测电路进行系统仿真。仿真结果验证了相位检测方案的可行性。     

连续波多普勒测速雷达射频前端电路设计与仿真

介绍了微波测速雷达的基本原理与结构模型,提出了频率为950 MHz的连续波多普勒测速雷达射频前端收发电路的设计方法,并对该电路的振荡条件,混频特性,放大原理进行了详细分析。利用OrCAD／PSpice9．2仿真软件,对射频电路收发系统进行仿真分析,仿真结果进一步验证了电路设计的合理性和可行性。     

微硅陀螺性能影响因素及其对策研究

论述了微硅陀螺的发展概况 ,总结了微硅陀螺的几类典型结构 ,分析了微硅振动陀螺总体性能的影响因素。从制作工艺、材料特性、系统模型的确立及接口设计上详细分析了性能约束因子。针对这些约束因素 ,本文提出了提高振动微硅陀螺性能的对策及发展方向     

纳米膜隧穿效应微陀螺的结构设计与加工

基于GaAs材料和器件的制造工艺,介绍了纳米膜隧穿器件和微陀螺的结构设计方法和工艺加工方法。阐述了基于纳米膜隧穿效应微陀螺的工作原理,对纳米膜隧穿器件和微陀螺的结构进行了设计,分析了微陀螺的模态频率设计和匹配仿真。采用反应离子刻蚀(RIE)刻蚀和感应耦合等离子体(ICP)刻蚀方法分别对隧穿器件和微陀螺结构进行了加工,利用扫描电镜观测,加工结果较好。利用冲击信号测试了微陀螺的频率响应,讨论了微陀螺的模态频率测试结果和匹配情况,证明微陀螺在驱动方向和检测方向上能够工作且模态频率匹配程度较好。实验结果表明,提出的GaAs材料微陀螺结构设计方法和工艺加工方法是可行的,能够应用于GaAs基微陀螺结构设计与制造。     

微硅陀螺性能影响因素及其对策研究

论述了微硅陀螺的发展概况,总结了微硅陀螺的几类典型结构,分析了微硅振动陀螺总体性能的影响因素.从制作工艺、材料特性、系统模型的确立及接口设计上详细分析了性能约束因子.针对这些约束因素,本文提出了提高振动微硅陀螺性能的对策及发展方向.     

Series equivalent circuit representation of SiO2Si interface and oxide trap states

The small-signal frequency response of silicon dioxide-silicon interface and oxide trap states has been investigated and interpreted using a series R-C equivalent circuit model instead of the commonly used parallel R-C equivalent circuit model. It is shown that the series equivalent circuit model is advantageous in extracting the time constants of the oxide traps located in the silicon dioxide layer from experimental data and allows a determination of the spatial extension of the oxide traps. Comparisons of a two-step model, consisting of the Shockley-Read-Hall transition between the band and the interface states and the elastic tunneling transition between the interface and oxide trap states, with experimental data are given to illustrate the range of experimental data required to evaluate an unique set of tunneling and SRH parameters.     

Interface edge effect and its contribution to the frequency dispersion of metal-oxide-semiconductor admittance

Room temperature frequency dispersion of the admittance of Metal-Oxide-Semiconductor (MOS) capacitors made on non-degenerate n-type silicon substrate with (111) surface orientation was studied. A simplified lumped equivalent circuit model which takes into account the interface edge effect, i.e. carrier generation-recombination-trapping via interface states near the edge of the surface inversion region, is proposed and found to be in good agreement with experimental data. Our model also suggests another method of calculating the density of interface states. Fundamental properties of interface states are estimated from experimental data. A self-consistency check is made among the values of equivalent circuit elements to substantiate our model.     

Threshold voltage model for deep-submicron fully depleted SOI MOSFETs with back gate substrate induced surface potential effects

A simple analytical threshold voltage model for short-channel fully depleted SOI MOSFETs has been derived. The model is based on the analytical solution of the two-dimensional potential distribution in the silicon film (front silicon), which is taken as the sum of the long-channel solution to the Poisson's equation and the short-channel solution to the Laplace equation, and the solution of the Poisson's equation in the silicon substrate (back silicon). The proposed model accounts for the effects of the back gate substrate induced surface potential at the buried oxide-substrate interface which contributed an additional 15–30% reduction in the threshold voltage for the devices used in this work. Conditions on the back gate supply voltage range are determined upon which the surface potential at the buried oxide-substrate interface is accumulated, depleted, or inverted. The short-channel associated drain induced barrier lowering effects are also included in the model. The model predications are in close agreement with PISCES simulation results. The equivalence between the present model and previously reported models is proven. The proposed model is suitable for use in circuit simulation tools such as Spice.     

多晶硅TFT热载流子效应的模拟研究

热载流子效应引起的器件电学特性退化会严重影响电路的工作性能。文章结合多晶硅薄膜晶体管沟道电流的理论模型,讨论了热载流子效应与界面陷阱的关系。沟道载流子在大的漏电场牵引下,运动到漏结附近获得很大的能量从而成为热载流子。如果热载流子能量超过Si-SiO2界面势垒高度,会注入到栅氧层或陷落到界面陷阱,使阈值电压和沟道电流发生退化现象。同时,对多晶硅薄膜晶体管输出特性进行了模拟分析,模拟结果与理论模型基本一致。     

MEMS流体陀螺的研究进展

随着微机电技术（MEMS）的快速发展,惯性器件微陀螺得到了广泛的发展和应用,其中微流体陀螺具有体积小、重量轻、成本低和抗高冲击等独特优点。根据陀螺原理的不同介绍了几种微流体陀螺,包括气体对流微陀螺、射流微陀螺、ECF流体微陀螺和超流体陀螺,气体对流陀螺和射流微陀螺属于常用的典型流体陀螺,而ECF流体陀螺和超流体陀螺属于新型的流体陀螺,分别分析了它们的原理和应用情况,并对它们的应用前景进行了展望,微流体陀螺将在惯性导航和自动控制等方面发挥越来越重要的作用。     

Silicon heterojunction solar cell: a new buffer Layer concept with low-temperature epitaxial silicon

Amorphous silicon/crystalline silicon heterojunction solar cells, deposited by the plasma-enhanced chemical vapor deposition (PECVD) technique, have been fabricated using different technologies to passivate defects at the heterointerface: without treatment, the insertion of a thin intrinsic amorphous layer or that of a thin intrinsic epitaxial layer. The open circuit voltage of heterojunction solar cells fabricated including an intrinsic amorphous buffer layer is strangely lower than in devices with no buffer layer. The structure of the amorphous buffer layer is investigated by high resolution transmission electron microscope observations. As an alternative to amorphous silicon, the insertion of a fully epitaxial silicon layer, deposited at low temperature with conventional PECVD technique in a hydrogen-silane gas mixture, was tested. Using the amorphous silicon/crystalline silicon (p a-Si/i epi-Si/n c-Si) heterojunction structure in solar cells, a 13.5% efficiency and a 605-mV open circuit voltage were achieved on flat Czochralski silicon substrates. These results demonstrate that epitaxial silicon can be successfully used to passivate interface defects, allowing for an open circuit voltage gain of more than 50 mV compared to cells with no buffer layer. In this paper, the actual structure of the amorphous silicon buffer layer used in heterojunction solar cells is discussed. We make the hypothesis that this buffer layer, commonly considered amorphous, is actually epitaxial.     

Electromigration failure modes in aluminum metallization for semiconductor devices

Two wear-out type failure modes involving aluminum metallization for semiconductor devices are described. Both modes involve mass transport by momentum exchange between conducting electrons and metal ions. The first failure mode is the formation of an electrically open circuit due to the condensation of vacancies in the aluminum to form voids. The second is the formation of etch pits into silicon by the dissolution of silicon into aluminum, and the transport of the solute ions down the aluminum conductor away from the silicon-aluminum interface by electron wind forces. The process continues until an etch pit grows into the silicon to a depth sufficient to short out an underlying junction.     

点阵LCD控制器MSM6222B-xx及其应用

MSM6222B_xx是用低功耗CMOS硅栅工艺制造的点阵LCD控制器。它与4位/8位微控制器相结合可控制点阵字符型LCD上的字符显示。这个LSI内含16点COMMON(公共端 )驱动器、40点SEGMENT(段 )驱动器、显示数据RAM、字符产生器RAM、字符产生器ROM以及控制电路。文中介绍了MSM6222B -xx的原理、引脚排列和功能 ,给出了它与单片机的连接电路     

Some aspects on ruggedness of SiC power devices

This article is on effects that can destroy SiC power semiconductor devices. The failure physics in SiC devices are discussed based on the well understood effects in silicon devices. In some device properties, such as surge current, short circuit, static avalanche and dynamic avalanche, SiC has significant possible advantages compared to silicon. For cosmic ray stability, there are no unique results. Regarding thermal mechanical stress on interface materials, SiC is more challenging. The same may hold for electrical stress in passivation layers at the junction termination.