A Low Voltage Divide-by-4 Injection Locked Frequency Divider With Quadrature Outputs

This letter presents a low voltage quadrature divide-by-4 (divide4) injection-locked frequency divider (QILFD). The QILFD consists of a 1.8-GHz quadrature voltage controlled oscillator (QVCO) and two NMOS switches, which are inserted into the quadrature outputs of the QVCO for signal injection. The low-voltage CMOS divide4 QILFD has been implemented with the TSMC 0.18-mum 1P6 M CMOS technology and the core power consumption is 3.12mW at the supply voltage of 1.2V. The free-running frequency of the QILFD is tunable from 1.73 to 1.99GHz, the measured phase noise of QILFD is -118dBc/Hz at 1-MHz offset from the free running frequency of 1.82GHz. At the input power of 0dBm, the total locking range is from 6.86 to 8.02GHz as the tuning voltage is varied from 0 to 1.2V. The phase noise of the locked output spectrum is lower than that of free running ring oscillator by 11dBc/Hz. The phase deviation of quadrature output is about 0.8deg     

Low-power divide-by-3 injection-locked frequency dividers implemented with injection transformers

A new divide-by-3 injection-locked frequency divider (ILFD) is proposed. The ILFD consists of a 7.6 GHz voltage controlled oscillator (VCO) and two transformers, which are in series with the crosscoupled transistors in the VCO for signal injection. The proposed CMOS ILFD has been implemented with the TSMC 0.13 μm CMOS technology. At the supply voltage of 0.8 V, the core power consumption is 1.25 mW, and the free-running frequency of the ILFD is tunable from 7.2 to 7.87 GHz. At the input power of 0 dBm, the total divide-by-3 locking range is from 21.56 to 23.63 GHz as the tuning voltage is varied from 0.0 to 0.8 V. The phase noise of the locked ILFD output is lower than that of the free-running ILFD in the divide-by-3 mode.     

A Wide Band Injection Locked Frequency Divider With Variable Inductor Load

This letter proposes a new wide band CMOS injection locked frequency divider (ILFD). The circuit is made of a two-stage differential CMOS ring oscillator and is based on MOS switches directly coupled to the differential outputs of the ring oscillator. A tuning circuit composed of inductors in series with a metal oxide semiconductor field effect transistor is used to extend the locking range. The divide-by-two ILFD can provide wide locking range and the measured results show that at the supply voltage of 1.8 V, the free-running frequency of the ILFD is operating from 0.92 to 3.6 GHz while the Vtune is tuned from 0 to 1.8 V. At the incident power of 0 dBm, this ILFD has a wide locking range from 1.15 to 7.4 GHz     

A Frequency Divider Implemented With a Subharmonic Mixer and a Divide-by-Two Divider

This letter proposes a divide-by-four injection-locked frequency divider (ILFD) with the use of a subharmonic mixer and a divide-by-two frequency divider (D2FD). The D2FD circuit consists of a two-stage differential CMOS ring oscillator with n-MOS switches directly coupled to its differential outputs, the measured phase noise of the D2FD is -97 dBc/Hz at 1-MHz offset from the free running frequency of 1.08GHz. The low-voltage CMOS divide-by-four FD (D4FD) has been implemented with the UMC 0.18-mum 1P6M CMOS technology and the power consumption is 9 mW at the supply voltage of 1.2 V. At the input power of 0 dBm, the D4FD can function properly with about 330-MHz locking range from 4.15 to 4.48GHz     

A Low Voltage 0.35$mu$m CMOS FrequencyDivider With the Body Injection Technique

This letter proposes a new CMOS injection locked frequency divider (ILFD) fabricated in a 0.35 mum CMOS process. The ILFD circuit is realized with a cross-coupled CMOS LC-tank oscillator, and the injecticon is carried out through the bodies of cross- coupled transistors. The self-oscillating ILFD is injection-locked by second-(third-) harmonic input to obtain the division order of two (three). Measurement results show that at the supply voltage of 1.5 V and at the incident power of 10 dBm, the locking range is from the incident frequency 6.94 to 8.41 GHz in the divide-by-3 mode and the operation range is from the incident frequency 4.56 to 5.59 GHz in the divide-by-2 mode.     

Circuit Techniques for CMOS Divide-By-Four Frequency Divider

This letter describes circuit techniques for obtaining divide-by-four (divide4) frequency dividers (FDs) from CMOS ring-oscillator based injection locked frequency dividers (ILFDs). The circuit is made of a two-stage differential CMOS ring oscillator and is based on MOS switches directly coupled to the differential outputs of the ring oscillator. At the supply voltage of 1.8V and at the incident power of 0dBm, for a dual-band ILFD, the divide4 ILFD can provide a locking range of 6.3% from 5.39 to 6.12GHz at low band and 5.9% from 8.84 to 9.38GHz at high band when the dc bias of MOS switches V_inj changes from 0.7 to 1.1V     

A Wide Locking Range LC-Tank Injection-Locked Frequency Divider

This letter proposes a wideband injection-locked frequency divider (ILFD) and describes the operation principle of the ILFD. The circuit is made of a differential CMOS LC-tank oscillator and is based on the direct injection topology. The wideband function is obtained by tuning the switch across the tank inductors. The divide-by-two ILFD can provide wide locking range and the measurement results show that at the supply voltage of 1.8 V, the dual-band divider free-running frequencies are from 1.77 to 2.17 GHz for the low-band mode, and from 2.59 to 3.2 GHz for the high-band mode. At the incident power of 0 dBm, the locking range is about 1.7 GHz from the incident frequency 3.31 to 5.01 GHz at low band and 4.06 GHz from 3.94 to 8.0 GHz at high-band mode. The circuit can be used as a single wideband ILFD.     

A Ring-Oscillator-Based Wide Locking Range Frequency Divider

This letter proposes a wide locking range injection locked frequency divider (ILFD) and describes the operation principle of the ILFD. The circuit is made of a dual band two-stage differential complementery metal–oxide–semiconductor (CMOS) ring oscillator and is based on MOS switches directly coupled to the differential outputs of the ring oscillator. The divide-by-two ILFD can provide wide locking range and the measurement results show that at the supply voltage of 1.8-V, the divider free-running frequencies are 1.36GHz and 2.3GHz, and at the incident power of 0dBm, the locking range is about 1.75GHz from the incident frequency 1.9GHz to 3.65GHz at low band and 2.55GHz from 2.95GHz to 5.5GHz at high band.     

Dual-band ultra-wide tuning range CMOS voltage-controlled oscillator

A dual-band wide-tuning range LC CMOS voltage controlled oscillator (VCO) topology is proposed. Dual-band operation is realised by employing a double-tuned double-driven transformer as a resonator. The proposed approach eliminates MOS switches, which are typically used in multi-standard oscillators, and thus improves phase noise and tuning range characteristics. The concept is demonstrated through the design of an LC VCO in a standard 0.18 mum CMOS process. Two frequency bands are realised (2.4 and 6 GHz) with 740 MHz tuning range in the first band and 1.56 GHz tuning range in the second band. Operating from a 1.8 V supply, the VCO has a simulated phase noise of -119 dBc/Hz in the 2.4 GHz band and -110 dBc/Hz in the 6 GHz band at 600 KHz offset from the carrier     

SDH系统STM-16速率级CMOS注入同步环形振荡器

基于0.25μm CMOS工艺,通过在环形振荡器的基础上引入注入同步技术,实现了一种新颖的应用于SDH系统STM-16速率级的注入同步振荡器.测试结果表明,该振荡器中心频率为2.488GHz,具有150MHz的电压调谐范围,相位噪声为-100dBc/Hz@1MHz.当注入峰峰值为50mV的信号时,相位噪声为-91.7dBc/Hz@10kHz,并具有100MHz的锁定范围.应用这种注入同步振荡器于时钟恢复电路的高Q值锁相环时,可以解决窄锁定范围的问题,而无需另加复杂的锁频环.     

LC-Tank Colpitts Injection-Locked Frequency Divider With Record Locking Range

A new wide locking range injection-locked frequency divider (ILFD) using a standard 0.18-$mu$ m CMOS process is presented. The ILFD is based on a differential voltage controlled oscillator (VCO) with two embedded injection metal oxide semiconductor field effect transistors (MOSFETs) for coupling external signal to the resonators. The new VCO is composed of two single-ended VCOs coupled with cross-coupled MOSFETs and a transformer. Measurement results show that at the supply voltage of 1.5 V, the divider's free-running frequency is tunable from 5.85 to 6.17 GHz, and at the incident power of 0 dBm the locking range is about 7.1 GHz (65.4%), from the incident frequency 7.3 to 14.4 GHz. The ILFD has a record locking range percentage among published divide-by-2 $LC$-tank ILFDs.      

A wide-locking range 6-phase divide-by-3 injection-locked frequency divider

A 6-phase divide-by-3 CMOS injection locked frequency dividers (ILFDs) have been proposed and implemented in a 0.35 μm CMOS process. The ILFD circuits are realised with a 3-stage double cross-coupled CMOS ring oscillator. The self-oscillating voltage controlled oscillator (VCO) is injection-locked by 3th-harmonic input to obtain the division factor of 3. Measurement results show that as the supply voltage varies from 1.2 to 3.5 V, the free-running frequency is from 0.136 to 0.7 GHz. At the incident power of ?5 dBm, the locking range in the divide-by-3 mode is from the incident frequency 0.38–2.31 GHz.     

Gigahertz range injection locked frequency dividers with band-width enhancement and supply rejection

A feedback topology, improving the performance of injection locked frequency dividers (ILFDs) in terms of locking range and supply rejection, is presented. The locking range is improved by 60% compared with conventional designs. The proposed ILFD can work robustly with supply rejection since the self-resonant frequency of the proposed ILFDs is independent of the input DC voltage. Fabricated in a standard 0.18 mm CMOS technology, the proposed ILFD is able to work from 4 to 8.2 GHz with a maximum power consumption of 2.84 mW from a 1.8 V supply.     

A Millimeter-Wave CMOS LC-Tank VCO With an Admittance-Transforming Technique

A novel circuit topology suitable for millimeter-wave voltage-controlled oscillators (VCOs) is presented. With the admittance-transforming technique, the proposed VCO can operate at a frequency close to the f_max of the transistors while maintaining remarkable circuit performance in terms of phase noise, tuning range, and output power. Using a standard micrometer CMOS process, a U-band VCO is implemented for demonstration. The fabricated circuit exhibits a frequency tuning range of 1.1 GHz in the vicinity of 50 GHz. The measured output power and phase noise at 1-MHz offset are -11 dBm and -101 dBc/Hz, respectively. Operated at a supply voltage of 1.8 V, the VCO core consumes a DC power of 45 mW.     

Multi-Modulus LC Injection-Locked Frequency Dividers Using Single-Ended Injection

A new wide-locking range multi-modulus LC-tank injection locked frequency divider (ILFD) is proposed and was fabricated in a 0.18 $mu {rm m}$ CMOS process. The ILFD circuit is realized with a complementary MOS LC-tank oscillator and an injection composite composed of an inductor in series with an injection MOS. The two output terminals of the injection composite are connected to the resonator outputs. The ILFD can be used as a first-harmonic oscillator (ILO), even-modulo or odd-modulo oscillator depending upon the incident frequency of injection signal. At the supply voltage of 1.5 V, the free-running frequency is from 4.85 to 5.13 GHz, the current and power consumption of the divider without buffers are 2.78 and 4.17 mW, respectively. At the incident power of 0 dBm, the locking range in the divide-by-1(2, 3, 4) mode is from the incident frequency 3.72 to 8.69 (8.42 to 10.95, 13.66 to 16.03, 19.13 to 20.5) GHz.      

A Tail-Injected Divide-by-4 SiGe HBT Injection Locked Frequency Divider

This letter presents a silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) divide-by-4 injection locked frequency divider (ILFD). The ILFD is based on a single-stage voltage-controlled oscillator with active-inductor, and was fabricated in the 0.35 mu m SiGe 3P3M BiCMOS technology. The divide-by-4 function is performed by injecting a signal to the base of the tail HBT. Measurement results show that when the supply voltage V_DD is 3.1 V and the tuning voltage is tuned from 2.0 to 2.8 V, the divider free-running oscillation frequency is tunable from 2.12 to 2.76 GHz, and at the incident power of 0 dBm the operation range is about 1.15 GHz, from the incident frequency 8.55 to 9.7 GHz. The die area is 0.65 times 0.435 mm².     

Design of wide-band CMOS VCO for multiband wireless LAN applications

In this paper, a general design methodology of low-voltage wide-band voltage-controlled oscillator (VCO) suitable for wireless LAN (WLAN) application is described. The applications of high-quality passives for the resonator are introduced: 1) a single-loop horseshoe inductor with Q > 20 between 2 and 5 GHz for good phase noise performance; and 2) accumulation MOS (AMOS) varactors with C/sub max//C/sub min/ ratio of 6 to provide wide-band tuning capability at low-voltage supply. The adverse effect of AMOS varactors due to high sensitivity is examined. Amendment using bandswitching topology is suggested, and a phase noise improvement of 7 dB is measured to prove the concept. The measured VCO operates on a 1-V supply with a wide tuning range of 58.7% between 3.0 and 5.6 GHz when tuned between /spl plusmn/0.7 V. The phase noise is -120 dBc/Hz at 3.0 GHz, and -114.5 dBc/Hz at 5.6 GHz, with the nominal power dissipation between 2 and 3 mW across the whole tuning range. The best phase noise at 1-MHz offset is -124 dBc/Hz at the frequency of 3 GHz, a supply voltage of 1.4 V, and power dissipation of 8.4 mW. When the supply is reduced to 0.83 V, the VCO dissipates less than 1 mW at 5.6 GHz. Using this design methodology, the feasibility of generating two local oscillator frequencies (2.4-GHz ISM and 5-GHz U-NII) for WLAN transceiver using a single VCO with only one monolithic inductor is demonstrated. The VCO is fabricated in a 0.13-/spl mu/m partially depleted silicon-on-insulator CMOS process.     

SiGe Bipolar VCO With Ultra-Wide Tuning Range at 80 GHz Center Frequency

A SiGe millimeter-wave VCO with a center frequency around 80 GHz and an extremely wide (continuous) tuning range of 24.5 GHz ( ap 30%) is presented. The phase noise at 1 MHz offset is -97 dBc/Hz at the center frequency (and less than -94 dBc/Hz in a frequency range of 21 GHz). The maximum total output power is about 12 dBm. A cascode buffer improves decoupling from the output load at reasonable VCO power consumption (240 mW at 5 V supply voltage). A low-power frequency divider (operating up to 100 GHz) provides, in addition, a divided-by-four signal. As a further intention of this paper, the basic reasons for the limitation of the tuning range in millimeter-wave VCOs are shown and the improvement by using two (instead of one) varactor pairs is demonstrated.     

A Low‐Spur CMOS PLL Using Differential Compensation Scheme

This paper proposes LC voltage‐controlled oscillator (VCO) phase‐locked loop (PLL) and ring‐VCO PLL topologies with low‐phase noise. Differential control loops are used for the PLL locking through a symmetrical transformer‐resonator or bilaterally controlled varactor pair. A differential compensation mechanism suppresses out‐band spurious tones. The prototypes of the proposed PLL are implemented in a CMOS 65‐nm or 45‐nm process. The measured results of the LC‐VCO PLL show operation frequencies of 3.5 GHz to 5.6 GHz, a phase noise of –118 dBc/Hz at a 1 MHz offset, and a spur rejection of 66 dBc, while dissipating 3.2 mA at a 1 V supply. The ring‐VCO PLL shows a phase noise of –95 dBc/Hz at a 1 MHz offset, operation frequencies of 1.2 GHz to 2.04 GHz, and a spur rejection of 59 dBc, while dissipating 5.4 mA at a 1.1 V supply.     

Colpitts Injection-Locked Frequency Divider Implemented With a 3-D Helical Transformer

This letter proposes a wide locking range and low power complementary Colpitts injection-locked frequency divider (ILFD) employing a 3-D helical transformer. The proposed ILFD consists of two single-ended complementary Colpitts oscillators coupled by a 3-D transformer to form a differential oscillator. The aim of using the 3-D transformer is to reduce chip size. The divide-by-2 LC-tank ILFD is implemented by adding an injection nMOS between the differential outputs of the voltage controlled oscillator. The measurement results show that at the supply voltage of 1.8 V, the divider free-running frequency is tunable from 4.24 to 4.8 GHz. At the incident power of 0 dBm, vtune=0.9 V, and V _DD=1.5 V, the locking range is about 2.4 GHz (26.9%), from the incident frequency 7.7 to 10.1 GHz. The core power consumption is 3.9 mW. The die area is 0.548times 0.656 mm².