适用于RFID标签及无线传感器的射频唤醒电路

有效的功耗管理是提升有源RFID标签以及无线传感器节点电池使用寿命的重要方法,一种无源射频唤醒电路可以用来控制标签以及传感器节点的工作状态,使之在外界无线电波控制下进行唤醒状态与休眠状态的切换,与传统周期性唤醒方法相比,该方法减少了大量能量损耗.围绕着提高射频唤醒电路灵敏度的指标,对阻抗匹配网络以及整流电路进行了优化.仿真和测试结果表明该电路在-27.7dBm输入功率下可以产生220mV直流输出.该唤醒电路本身无需耗电,实践表明将其应用在RFID标签及无线传感器节点设计中可显著提升电池使用寿命.     

低功耗有源UHF-RFID标签芯片

采用SMIC 0.18 μm CMOS工艺,设计了一种低功耗的超高频有源RFID标签芯片射频接收前端电路.其中,低噪声放大器(LNA)采用共源共栅源极电感负反馈差分结构,下变频混频器(Mixer)采用吉尔伯特(Gilbert)有源双平衡结构.通过整体及模块电路优化,该电路在较低功耗下仍然具有较好性能.仿真结果表明,整个接收端功耗仅为14 mW,与传统射频前端芯片相比,功耗降低53%;整体增益为21.6 dB,噪声系数7.1 dB,三阶输入截止点-18.9 dBm,满足有源UHF-RFID标签芯片低功耗高性能的应用需求.     

低压低功耗无源UHF RFID标签芯片模拟前端电路的设计

本文从设计符合EPCTM C1G2协议的超高频无源射频识别标签芯片的角度出发,对RFID标签芯片模拟前端电路进行设计.通过对各个关键电路的功耗与电源进行优化,实现了一个符合协议要求的低电压、低功耗的超高频无源RFID标签芯片的模拟前端.该UHF RFID标签模拟前端设计采用SMIC 0.18 μm EEPROM CMOS工艺库.仿真结果表明,标签芯片模拟前端的整体功耗控制在2.5 μW以下,工作电源可低至1 V,更好地满足了超高频无源射频识别标签芯片应用需求.     

一种射频有源标签充电器的设计与实现

有源射频识别（RFID）技术因其工作距离远、读写功耗低等优势,在民用和军事领域中得到了广泛的应用。由于某些特殊应用场合的限制,有源RFID标签需要实现具有防水、防尘等性能的全密闭封装。为解决全密封的有源RFID标签电池充电问题,提出了一种无线充电电路的设计与实现方案。首先,介绍了整个电路的实现原理,分析了发射和接收电路的实现方式;其次,设计并实现了可对40个标签同时充电的电路;最后进行了标签的充电和放电实验。实验结果表明,所设计的充电电路性能稳定,充电时间较短。     

射频识别芯片设计中时钟树功耗的优化与实现

UHF RFID是一款超高频射频识别标签芯片,该芯片采用无源供电方式,对于无源标签而言,工作距离是一个非常重要的指标,这个工作距离与芯片灵敏度有关,而灵敏度又要求功耗要低,因此低功耗设计成为RFID芯片研发过程中的主要突破点。在RFID芯片中的功耗主要有模拟射频前端电路,存储器,数字逻辑三部分,而在数字逻辑电路中时钟树上的功耗会占逻辑功耗不小的部分。本文着重从降低数字逻辑时钟树功耗方面阐述了一款基于ISO18000-6Type C协议的UHF RFID标签基带处理器的的优化和实现。     

低功耗UHF频段RFID标签数字基带电路

通过对UHF频段EPC Global Class1 Generate2协议进行分析,详细论述了符合协议要求的被动式无源射频身份识别(RFID)标签的数字电路系统方案,并提出了一种新颖的、针对RFID标签的数字基带低功耗电路。在0.18 μm CMOS工艺环境下,使用Synopsys工具对电路进行前端综合和后端物理实现,同时对电路的功耗进行了简要的分析。仿真及测试结果表明,该标签数字基带电路功能符合协议要求。     

ISO/IEC18000-6B标签逻辑电路低面积设计

简要介绍了射频识别技术(RFID)协议ISO/IEC 18000-6B的通信,并基于该协议用VHDL语言设计了标签的逻辑部分电路.设计时运用命令分类、实时处理、资源共享等技术减少硬件资源,在SMIC 0.18μm工艺下综合为24 791μm2,并用Primepower测得功耗约10.6μW.设计采用Xilinx的FPGA开发平台进行了验证,逻辑分析仪结果表明设计满足要求.该电路应用于ISO/IEC18000-6B协议下RFID标签的数字部分.     

超高频RFID标签的数字电路设计

在研究读写器和射频标签通信过程的基础上,结合EPC C1G2协议以及ISO/IEC18000-6协议,采用VHDL语言设计出一种应用于超高频段的射频标签数字电路.对电路的系统结构和模块具体实现方法进行了描述.基于0.18 μm CMOS工艺标准单元库,采用EDA工具对电路进行了前端综合和后端物理实现.给出的仿真结果表明该电路符合协议要求,综合后的电路规模约为11000门,功耗约为35 μW.该电路可应用于超高频段的各种RFID标签的数字部分.     

疏耦合电子标签研究与实现

近年来,RFID电子标签技术成为热门新科技,由于功耗和成本的原因阻碍了其广泛应用.介绍RFID系统的组成和实现原理,给出低成本、低功耗无源电子标签芯片体系结构,提出低功耗射频接口电路、数字控制电路、存储电路设计关键技术和优化设计,并成功应用到基于IS0/IEC 15693协议无源电子标签芯片设计中,在SMIC 0.35μm E2PROM工艺条件下流片成功,芯片面积为1.86 mm2,设计指标满足标签芯片的性能要求.     

一种低功耗有源射频识别系统的设计

研究了一种低功耗有源射频识别系统组网与设计技术,该系统可在软硬件两方面实现低功耗设计。在硬件方面,采用NORDIC公司的nRF24LE1芯片作为有源标签,nRF24L01+芯片作为节点射频芯片,STM32单片机作为节点控制芯片,实现了芯片与节点的注册与通信;软件方面,采用时分复用方法,合理分配有源芯片的时隙,设计了防冲突机制,使得芯片在极端的时间内工作,实现了低功耗组网通信。     

RFID 有源电子标签节能技术研究

在对RFID有源电子标签节能常规解决方法中存在的弊端进行分析的基础上,提出了利用感应器切换RFID有源电子标签的工作模式和对RFID有源电子标签根据不同应用场景设置不同休眠策略的办法,有效减少RFID有源电子标签射频发送次数,达到节约能量的一种新的节能技术。以典型应用详细说明了电子标签进出出入口方向的准确判定和休眠时间策略设置方法,并介绍了在重要物品管控系统中利用新节能技术研发的感应器、RFID有源电子标签的功能、组成、软件设计,从而验证新的节能技术能应用于RFID有源电子标签系统中。     

标准CMOS工艺光电二极管及光标签的研制

提出了一种作为无源射频(RFID)识别标签电源的光电二极管。此方案采用光电转换获取能量的方式替代传统电磁辐射获得能量的方式,克服了传统方案中RFID读写器辐射强且RFID Tag抗干扰能力差的缺点。光电二极管采用标准UMC 0.18μm CMOS工艺制作在RFID Tag上。研究了光电二极管的光伏及伏安特性,并给出了实验结果;使用低压测试电路对制作完毕的PD进行了功率输出性能实验,实验结果证明PD满足设计指标和后续电路的使用要求;对实验数据进行系统建模和参数估计,建立了可以应用于Cadence仿真环境的光电二极管模型;最后,利用仿真模型进行光标签的设计,流片测试结果证明了光标签的可行性。     

用于射频标签的低功耗上电复位电路

介绍了一种用于射频标签芯片中数字逻辑部分的上电复位电路。该上电复位电路适应于低电源电压的芯片,改变MOS晶体管的参数以及延迟时间可以调节脉冲的宽度和数字门电路加宽脉冲的宽度,通过反馈管,电路能够抵抗比较大的电源电压噪声影响。电路产生上电复位信号脉冲后,通过反馈控制使能端信号关断整个电路,实现低功耗。电路采用华虹NEC公司0.13μm标准CMOS工艺流片,测试结果表明,此电路能够输出有效的脉冲信号;脉冲过后的导通电流基本为0。FPGA平台的验证表明,芯片输出的POR信号能够正确启动标签中的数字基带芯片,输出信号有效。     

An Ultra-Low-Power Long Range Battery/Passive RFID Tag for UHF and Microwave Bands With a Current Consumption of 700 nA at 1.5 V

We present for the first time, a fully integrated battery powered RFID integrated circuit (IC) for operation at ultrahigh frequency (UHF) and microwave bands. The battery powered RFID IC can also work as a passive RFID tag without a battery or when the battery has died (i.e., voltage has dropped below 1.3 V); this novel dual passive and battery operation allays one of the major drawbacks of currently available active tags, namely that the tag cannot be used once the battery has died. When powered by a battery, the current consumption is 700 nA at 1.5 V (400 nA if internal signals are not brought out on test pads). This ultra-low-power consumption permits the use of a very small capacity battery of 100 mA-hr for lifetimes exceeding ten years; as a result a battery tag that is very close to a passive tag both in form factor and cost is made possible. The chip is built on a 1-mum digital CMOS process with dual poly layers, EEPROM and Schottky diodes. The RF threshold power at 2.45 GHz is -19 dBm which is the lowest ever reported threshold power for RFID tags and has a range exceeding 3.5 m under FCC unlicensed operation at the 2.4-GHz microwave band. The low threshold is achieved with architectural choices and low-power circuit design techniques. At 915 MHz, based on the experimentally measured tag impedance (92-j837) and the threshold spec of the tag (200 mV), the theoretical minimum range is 24 m. The tag initially is in a "low-power" mode to conserve power and when issued the appropriate command, it operates in "full-power" mode. The chip has on-chip voltage regulators, clock and data recovery circuits, EEPROM and a digital state machine that implements the ISO 18000-4 B protocol in the "full-power" mode. We provide detailed explanation of the clock recovery circuits and the implementation of the binary sort algorithm, which includes a pseudorandom number generator. Other than the antenna board and a battery, no external components are used.     

Analysis of energy consumption for multiple object identification system with active RFID tags

Radio frequency identification (RFID) systems are very effective for identifying objects. Existing published works focus on designing efficient collision resolution protocols for the tag identification problem in RFID systems with passive RFID tags. However, advances in low‐cost and low‐power sensing technologies will make active RFID tags more popular and affordable in the near future. In multiple object identification systems with active tags, the tags are designed for extremely low‐cost large‐scale applications such that battery replacement is not feasible. This imposes a critical energy‐constraint on the communication protocols used in these systems. In this paper, we analyze energy consumption and identification times for several protocols. The objective is to decrease energy consumption of tags by reducing both the total identification time and the total active time. Copyright © 2007 John Wiley & Sons, Ltd.     

A self-powered piezoelectric energy harvesting interface circuit with efficiency-enhanced P-SSHI rectifier

The key to self-powered technique is initiative to harvest energy from the surrounding environment.Harvesting energy from an ambient vibration source utilizing piezoelectrics emerged as a popular method.Efficient interface circuits become the main limitations of existing energy harvesting techniques.In this paper,an interface circuit for piezoelectric energy harvesting is presented.An active full bridge rectifier is adopted to improve the power efficiency by reducing the conduction loss on the rectifying path.A parallel synchronized switch harvesting on inductor (P-SSHI) technique is used to improve the power extraction capability from piezoelectric harvester,thereby trying to reach the theoretical maximum output power.An intermittent power management unit (IPMU) and an output capacitor-less low drop regulator (LDO) are also introduced.Active diodes (AD) instead of traditional passive ones are used to reduce the voltage loss over the rectifier,which results in a good power efficiency.The IPMU with hysteresis comparator ensures the interface circuit has a large transient output power by limiting the output voltage ranges from 2.2 to 2 V.The design is fabricated in a SMIC 0.18μm CMOS technology.Simulation results show that the flipping efficiency of the P-SSHI circuit is over 80％ with an off-chip inductor value of 820 μH.The output power the proposed rectifier can obtain is 44.4μW,which is 6.7× improvement compared to the maximum output power of a traditional rectifier.Both the active diodes and the P-SSHI help to improve the output power of the proposed rectifier.LDO outputs a voltage of 1.8 V with the maximum 90％ power efficiency.The proposed P-SSHI rectifier interface circuit can be self-powered without the need for additional power supply.     

用异步收发器HT6720设计RFID系统

HT6720是可在射频识别系统中制作电子标签的专用集成电路，工作频率为13．56MHz，属于中频识别芯片。该芯片内置96bit OPT存储器，且为只读型。由于HT6720所需要的数据载体结构简单，因此，通过HT6720可用极低的成本生产只读标签和设计射频识别系统。     

有源RFID系统中可靠通信的研究

有源RFID是一种自动识别技术,在追踪和识别高价值商品方面具有突出优势。针对通信距离的增加,有源RFID系统出现识读不可靠、数据出错等问题。构建了基于CC2510的有源RFID系统,并结合硬件特性,重点对读写器与有源电子标签之间的通信数据帧标识、数据帧结构、标签防冲突处理和数据错误重传机制等方面进行探讨和设计。实验结果表明,改进后的通信机制对不同的测试环境具有一定的适应能力,表现出较好的可靠性。