Si基单片集成850nm光接收芯片研究

设计并制备了一种Si基单片集成850nm光接收芯片,包括"P+/N-EPI/BN+"结构的光电探测器(PD)、跨阻前置放大电路及其后续处理电路。分析了PD的结构,并对其光谱响应及频率响应进行模拟,在2.0V偏压下,PD在850nm的响应度为0.131A/W,截止频率为400 MHz。采用0.5μm BCD(bipolar、CMOS和DMOS)工艺流片,光接收芯片面积约为900μm×1 100μm。测试结果表明,PD暗电流为pA量级,响应度为0.12A/W。光接收芯片在155 Mb/s速率及误码率(BER)小于10-9情况下,灵敏度为-12.0dBm;在622 Mb/s速率及BER小于10-9情况下,灵敏度为-10.0dBm,并能得到清晰的眼图。将该光接收芯片封装后接入光接收模块,进行点对点光互联实验,获得很好的光信号通路。     

1Gb/s CMOS调节型共源共栅光接收机

基于特许0.35μm EEPROM CMOS标准工艺设计了一种单片集成光接收机芯片,集成了双光电探测器(DPD)、调节型共源共栅(RGC)跨阻前置放大器(TIA)、三级限幅放大器(LA,limiting amplifier)和输出电路,其中RGCTIA能够隔离光电二极管的电容影响,并可以有效地扩展光接收机的带宽。测试结果表明,光接收机的3dB带宽为821MHz,在误码率为10-9、灵敏度为-11dBm的条件下,光接收机的数据传输速率达到了1Gb/s;在3.3V电压下工作,芯片的功耗为54mW。     

高速12路并行CMOS单片光电集成接收机设计与实现

设计并实现了一个高速12路并行CMOS单片光电集成接收机.其每一路都包括一个光探测器、一个跨阻放大器以及后续放大电路.双光电二极管(DPD)结构可以提高接收机速度,但同时降低了响应度.在跨阻放大器电路中采用有源电感来展宽-3dB带宽.通过无锡上华(CSMC)0.6μm CMOS工艺流片并对芯片进行了测试.测试结果显示该接收机单路传输比特率可达0.8～1.4 Gb/s,总的12路可传输15Gb/s数据.     

高速12路并行CMOS单片光电集成接收机设计与实现

设计并实现了一个高速12路并行CMOS单片光电集成接收机.其每一路都包括一个光探测器、一个跨阻放大器以及后续放大电路.双光电二极管(DPD)结构可以提高接收机速度,但同时降低了响应度.在跨阻放大器电路中采用有源电感来展宽-3dB带宽.通过无锡上华(CSMC)0.6μm CMOS工艺流片并对芯片进行了测试.测试结果显示该接收机单路传输比特率可达0.8～1.4 Gb/s,总的12路可传输15Gb/s数据.     

CMOS单片光接收机的带宽设计

设计了一个由调节型级联跨阻抗放大器(TIA)和双光电二极管(DPD)构成的光电集成接收机.给出了DPD小信号电路模型和单片集成光接收机的带宽设计方法,给出限制DPD和光接收机带宽的重要因素,分析和模拟了这个光电集成接收机的带宽,用低成本的0.6μm CMOS工艺设计出1.71GHz带宽和49dB跨阻增益的接收机,并给出测试结果.     

一种新颖全差分光电集成接收机的标准CMOS实现

提出一种新颖的全差分光电集成接收机,它包含了全差分光电探测器和相应的差分接收电路,其中全差分光电探测器的作用是实现入射光信号到全差分光生电流信号的转换.采用特许3.3 V、0.35μm标准CMOS工艺,实现了一种相应的宽带、高灵敏度全差分光电集成接收机.测试结果表明:对于850 nm的入射光,集成全差分光电探测器的差分跨阻前置放大器(TIA)的工作速率可达到500 Mbit/s,而整个光接收机的带宽则达到了1.098 5 GHz;在10-12的误码率条件下,灵敏度可达到-12.3 dBm.     

30Gbit/s Parallel Optical Receiver Module

报道了一种基于CMOS工艺接收电路芯片和GaAs工艺1×12光电探测器阵列的30Gbit/s并行光接收模块.该模块采用并行光通信方案,利用中高速光电子器件实现信号的高速传输.直接使用未经封装的接收电路裸片和光探测器裸片,采用电路板上芯片技术封装制作模块,并通过倒装焊的方式实现了探测器阵列与列阵光纤的精确对准并形成了可插拔的光接口.测试结果表明模块的接收能力可以达到30Gbit/s.误码率小于10-13时,接收模块的灵敏度可以达到-13.6dBm.     

高灵敏度CMOS光电集成接收机设计

设计了一个由调节型级联跨阻抗放大器(TIA)和双光电二极管(DPD)构成的CMOS光电集成(OEIC)接收机.具体分析了这个光电集成接收机的噪声和灵敏度及其相互关系.接收机中的噪声主要是电路中电阻的热噪声和MOS器件的闪烁噪声.提出了优化接收机灵敏度的方法.通过低成本的CSMC 0.6μm CMOS工艺流片并对芯片进行了测试.从测试眼图可知,该CMOS光电集成接收机可工作在1.25GB/s的传输速率下,灵敏度为-12dBm.     

30Gbit/s并行光接收模块

报道了一种基于CMOS工艺接收电路芯片和GaAs工艺1×12光电探测器阵列的30Gbit/s并行光接收模块.该模块采用并行光通信方案,利用中高速光电子器件实现信号的高速传输.直接使用未经封装的接收电路裸片和光探测器裸片,采用电路板上芯片技术封装制作模块,并通过倒装焊的方式实现了探测器阵列与列阵光纤的精确对准并形成了可插拔的光接口.测试结果表明模块的接收能力可以达到30Gbit/s.误码率小于10-13时,接收模块的灵敏度可以达到-13.6dBm.     

标准CMOS工艺下单片集成光接收芯片的研究

设计了与标准CMOS工艺兼容的850 nm空间调制(Spatially Modulated,SM)结构光电探测器,在分析器件物理模型的基础上,建立了SPECTRE环境中等效电路的新模型.提出标准CMOS工艺下SM探测器与前置放大电路单片集成的电路设计.仿真结果表明,在850 nm光照下,SM探测器带宽达到400 MHz,并提供62 mA/W的响应度.整个集成芯片的工作速率为400 Mb/s,增益为0.81 kV/W,功耗为91 mW.     

OEICs for WDM transceiver modules fabricated by reactive ion etching on semi-insulating substrates

The design and fabrication of OEICs on semi-insulating InP substrates comprising 1300 nm DFB lasers, 1300/1530 nm wavelength duplexers and monitor photodiodes is described. OEIC lasing thresholds were as low as 20 mA. The through-state crosstalk for the integrated duplexer was typically -12 dB. Linear tracking of the laser output by the monitor photodiode was achieved with sensitivities in the region of 70 mu A/mW. The OEICs operated successfully in a 622 Mbit/s bidirectional optical link.<>     

A monolithically integrated 1-Gb/s optical receiver in 1-μm CMOStechnology

Results of a monolithically integrated Si optical receiver for applications in optical data transmission and in optical interconnects with wavelengths of 638 and 850 nm are presented. The optoelectronic integrated circuit (OEIC) implementing a vertical p-type-intrinsic-n-type photodiode achieves a data rate of 1 Gb/s for 638 nm with a sensitivity of -15.4 dBm at a bit-error rate of 10^-9 . The sensitivity of this OEIC in a 1.0-μm CMOS technology is improved by at least a factor of four compared to that of published submicrometer OEICs. A 25-THz.Ω effective transimpedance bandwidth product of the implemented amplifier is achieved     

400 Mbit/s transmission experiment using two monolithic optoelectronic chips

A successful optical transmission experiment at 400 Mbit/s was carried out with two OEIC modules over 4 km with an optical power margin of 4 dB. The modules with monolithic LD/driver and PIN/amp ICs were fabricated by a new technique to realise compactness and stability.     

量子密钥分发和经典光通信波分复用共纤传输研究

研究了量子密钥分发和经典光通信波分复用共纤传输的技术难点和可行性。基于系统重复频率 40 MHz的诱骗态相位编码BB84协议量子密钥分发设备,提出了3种量子信号与经典光信号的波分复用共纤传输方案：单纤双向CWDM共纤传输方案,复用1 550.12 nm波长量子信号、1 310 nm波长时钟信号以及正向1 590 nm波长100 Mbit/s速率光信号和反向1 610 nm波长100 Mbit/s速率光信号,光纤传输距离70 km下密钥成码率达到1.2 kbit/s;双纤双向CWDM共纤传输方案,复用1 550.12 nm波长量子信号、1 610 nm波长时钟信号以及1个波长的同向光信号在1 310 nm波长OOK光信号速率10 Gbit/s,光纤传输距离55 km下,密钥成码率达到1.58 kbit/s;双纤双向DWDM共纤传输方案,复用1 550.12 nm波长量子信号、1 610 nm波长时钟信号以及2个同向波长各自为1 551.72 nm和1 552.52 nm,并模拟100 Gbit/s相干光通信DP-QPSK信号接收功率,光纤传输距离70 km下,密钥成码率达到1.16 kbit/s。     

4×4 OEIC switch module using GaAs substrate

A compact 4×4 optical switch module consisting of a monolithic 4-channel OEIC receiver chip, a 4×4 GaAs IC chip, and a 4-channel OEIC transmitter chip has been developed for the first time. The module offers good performance, without an optical loss, a bandwidth of more than 600 MHz, and a crosstalk between neighboring channels of less than -20 dB. It has a good switching and distributive performance for high speed optical input signals of 560 Mbit/s. The switch module is attractive for use in high data-rate optical communication systems, particularly in local area networks, CATV systems, and intra-office links     

10Gbit/s甚短距离并行光传输模块与实验系统

介绍符合OIF-VSR4-03.0规范的10Gbit/s甚短距离(VSR)实验系统研究.该系统由16×622Mbit/s到4×2.488Gbit/s转换集成电路、自制12通道850nm垂直腔面发射激光器(VCSEL)并行光发射模块和商用12通道并行接收光模块构成.用一片FPGA实现转换芯片的全部功能,采用基于二分查找法的SDH STM-64/OC192 并行帧对齐及同步算法,大大提高了转换芯片的工作速度和节省了逻辑资源,自制12通道VCSEL并行发射模块工作速率达到12×2.488Gbit/s的设计指标.在SDH STM-64/OC192 10Gbit/s测试仪点到点的传输系统测试中,采用5米的12芯400MHz·km 62.5μm多模带状光纤互联,系统误码率低于1×10^-14.     

光纤以太网技术在城域网中的应用

光纤以太网网是指在光纤上运行以太网局域网（LAN）数据包接入服务的网络，底层连接可以以任何标准的以太网速度运行，包括10Mbit/s、100Mbit/s、1Gbit/s或10Gbit/s。光纤以及网把以太网技术扩展到LAN之外，进入城域网（MAN）。光纤以太网也将以太网的优越性扩展到了MAN，大大降低了运营商的网络建设成本。     

11 GHz bandwidth optical integrated receivers using GaAs MESFET andMSM technology

State-of-the-art performance of GaAs-FET-based monolithic optoelectronic integrated circuit (OEIC) receivers is reported. The OEIC receiver achieves -3-dB bandwidth as high as 11 GHz for optical signals at a wavelength of 850 nm. The feedback resistance of the receiver is 1000 Ω and the effective transimpedance into a 50 Ω load is 565 Ω. The effective transimpedance-bandwidth (TZBW) product is 6.1 THz-Ω. This ultra-high-performance receiver was implemented via a high-yield, low-cost direct ion implanted GaAs MESFET technology with a 0.6-μm gate length and a metal-semiconductor-metal (MSM) detector with 2-μm lines×3-μm spacings     

Long-wavelength PINFET receiver OEIC on a GaAs-on-InP heterostructure

A long-wavelength PINFET OEIC has been fabricated on a GaAs-on-InP heterostructure for the first time. A receiver sensitivity as high as ?31 dBm for 600Mbit/s NRZ has been obtained. The great potential of the GaAs-on-InP hetero-structure for high-performance, long-wavelength OEIC applications has been demonstrated.