Effect of plasma treatments on interface chemistry and adhesion strength between porous SiO2 low-k film and SiC/SiN layers

In this study, the interface chemistry and adhesion strengths between porous SiO₂ low-dielectric-constant film and SiN capping layer as well as SiC etch stop layer have been investigated under different plasma treatments. Elements of Si, O, and N constructed an interlayer region with mixing Si-N and Si-O bonds at the interface between the porous SiO₂ film and SiN capping layer. After plasma treatments especially O₂ plasma, the oxygen content at the interface increased, and the binding energy obviously shifted to a higher level. Under nanoindentation and nanoscratch tests, interface delamination occurred, and the interface adhesion strength was accordingly measured. After plasma treatments especially the O₂ plasma, more Si-O bonds of high binding energy existed at the interface, and thus the interface adhesion strength was effectively improved. The adhesion energy of SiO₂/SiN and SiC/SiO₂ interfaces was enhanced to 4.7 and 10.5 J/m² measured by nanoindentation test, and to 1.3 and 2.0 J/m² by nanoscratch test, respectively.     

Effect of plasma treatments on interface adhesion between SiOCH ultra-low-k film and SiCN etch stop layer

The effect of different plasma treatments on the interfacial bonding configurations and adhesion strengths between porous SiOCH ultra-low-dielectric-constant film and SiCN etch stop layer have been investigated in this study. From X-ray photoelectron spectroscopic analyses, interlayer regions of about 10 nm thick with complicated mixing bonds were found at SiOCH/SiCN interfaces. With plasma treatments, especially H₂/NH₃ two-step plasma, a carbon-depletion region of about 30 nm thick with more Si-O related bonds of high binding energy formed at the interface. Furthermore, the adhesion strengths of the SiOCH/SiCN interfaces were measured by nanoscratch and microscratch tests. For the untreated interface, the adhesion energy was obtained as about 0.22 and 0.44 J/m² by nanoscratch and microscratch tests, respectively. After plasma treatments, especially the H₂/NH₃ treatment, the interfacial adhesion energy was effectively improved to 0.41 and 0.89 J/m² because more Si-O bonds of high binding energy formed at the interfaces.     

Enhancement of adhesion strength of Cu layer with low dielectric constant SiC:H liners in Cu interconnects

One of the primary candidates for the liner/etch stop layer in damascene process is silicon nitride (Si₃N₄). However, silicon nitride has a high dielectric constant of 7.0. To reduce the effective dielectric constant in Copper (Cu) damascene structure, dielectric SiC:H (prepared by plasma enhanced chemical vapor deposition (PECVD) using trimethylsilane source) as the Cu diffusion barrier was studied. The dielectric constant of SiC:H used is 4.2. A systematic study was made on the properties of liner material and electro-chemically plated (ECP) Cu to enhance the adhesion strength in Cu/low-dielectric constant (k) multilevel interconnects. Though the effects of as Si₃N₄ the liner have been much studied in the past, less is known about the relation between adhesion strength of ECP Cu layer and physical vapor deposited (PVD) Cu seeds, with seed thickness below 1000 Å. The annealing of Cu seed layer was carried out at 200 °C in N₂ ambient for 30 min was carried out to study the impact on adhesion strength and the microstructure evolution on the adhesion between ECP Cu and its barrier layer. In the study, our claim that SiC:H barrier/etch stop layer is essential for replacing conventional Si₃N₄ layer in enhancing adhesion strength and interfacial bonding between Cu/dielectric interconnects.     

HF chemical etching of SiO2 on 4H and 6H SiC

Thickness and etch rate of SiO₂ films thermally grown on hexagonal SiC substrates were compared to results obtained from SiO₂/Si samples. The data confirm that profilometry and ellipsometry yield the same thickness values for oxides grown on Si and SiC. Within the accuracy of our measurements, oxides grown on different polytypes and faces of SiC etch at the same rate in a HF acid solution. The etch rate using a 50:1 H₂O:HF(50%) solution at room temperature is 0.1 nm/s and is uniform throughout the thickness of the SiO₂ films. The rate is the same as that obtained for SiO₂ grown on Si.     

Improved performance by using TaON/SiO2 as dual tunnel layer in Charge-Trapping nonvolatile memory

Tunneling–barrier engineered stacks with different high-κ dielectrics are investigated by fabricating the stacked structures of Al/Al₂O₃/HfLaON/ (TaON/SiO₂)/Si and Al/Al₂O₃/HfLaON/ (HfON/SiO₂)/Si. As compared to the device with HfON/SiO₂ dual tunnel layer (DTL), the one with TaON/SiO₂ DTL shows larger memory window (3.85 V at ± 13 V/1 s), higher program/erase speeds (1.85 V/−2.00 V at ± 12 V/100 μs), better endurance (window narrowing rate of 5.7% after 10⁵ cycles). The main mechanisms involved lie in (1) the higher dielectric constant of TaON which induces high electric field in the SiO₂ layer, (2) the smaller conduction/valence-band offsets between TaON and the Si substrate, and (3) better interface quality with SiO₂. Furthermore, compared with SiO₂ single tunnel layer, better retention characteristics can be achieved for the TaON/SiO₂ DTL due to its larger thickness.     

Textured silicon surface passivation by high‐rate expanding thermal plasma deposited SiN and thermal SiO2/SiN stacks for crystalline silicon solar cells

Expanding thermal plasma (ETP) deposited silicon nitride (SiN) with optical properties suited for the use as antireflection coating (ARC) on silicon solar cells has been used as passivation layer on textured monocrystalline silicon wafers. The surface passivation behavior of these high‐rate (>5 nm/s) deposited SiN films has been investigated for single layer passivation schemes and for thermal SiO₂/SiN stack systems before and after a thermal treatment that is normally used for contact‐firing. It is shown that as‐deposited ETP SiN used as a single passivation layer almost matches the performance of a thermal oxide. Furthermore, the SiN passivation behavior improves after a contact‐firing step, while the thermal oxide passivation degrades which makes ETP SiN a better alternative for single passivation layer schemes in combination with a contact‐firing step. Moreover, using the ETP SiN as a part of a thermal SiO₂/SiN stack proves to be the best alternative by realizing very low dark saturation current densities of <20 fA/cm² on textured solar‐grade FZ silicon wafers and this is further improved to <10 fA/cm² after the anneal step. Optical and electrical film characterizations have also been carried out on these SiN layers in order to study the behavior of the SiN before and after the thermal treatment. Copyright © 2008 John Wiley & Sons, Ltd.     

High selectivity (SiN/SiO2) etching using an organic solution containing anhydrous HF

An etching process with high selectivity for SiN relative to SiO₂ at a low temperature is required for an etching process in LSI process. We achieved SiN film etching with high selectivity using an organic solvent (ethylene glycol dimethyl ether) containing anhydrous hydrogen fluoride. Selectivity as high as 15 was obtained at 80 °C. It was found that anhydrous HF effectively induces high selectivity for SiN relative to SiO₂. SiN film etching with high selectivity performed at low temperature for a single wafer process can be readily applied to future node technology devices.     

Effect of titanium dioxide (TiO2) seed layer on the phase composition of 0.7Pb (Mg1/3Nb2/3)O3-0.3PbTiO3 film prepared by pulsed laser deposition

Lead-magnesium niobate-lead titanate (PMN-PT) thin films with and without the TiO₂ seed layer were deposited on Pt/Ti/SiO₂/Si substrates through pulsed laser deposition. The study aimed to characterize the effect of the TiO₂ seed layer on the phase composition and properties of PMN-PT film. Without the TiO₂ seed layer, the pure perovskite phase could be obtained in the thinner PMN-PT film while with the TiO₂ seed layer, the pure perovskite phase was formed in the thicker PMN-PT film. The ferroelectric properties of PMN-PT films with the TiO₂ seed layer were exhibited. As a result, the maximum amount of remnant polarization reached the amount of 32 μC/cm² for the PMN-PT thin film with the TiO₂ seed layer.     

Thin RF sputtered and thermal Ta2O5 on Si for high density DRAM application

Tantalum pentoxide thin films on Si prepared by two conventional for modern microelectronics methods (RF sputtering of Ta in Ar + O₂ mixture and thermal oxidation of tantalum layer on Si) have been investigated with respect to their dielectric, structural and electric properties. It has been found that the formation of ultra thin SiO₂ film at the interface with Si, during fabrication implementing the methods used, is unavoidable as both, X-ray photoelectron spectroscopy and electrical measurements, have indicated. The initial films (as-deposited and as-grown) are not perfect and contain suboxides of tantalum and silicon which act as electrical active centers in the form of oxide charges and interface states. Conditions which guarantee obtaining high quality tantalum oxide with dielectric constant of 32–37 and leakage current density less than 10⁻⁷ A/cm² at 1.5 V applied voltage (Ta₂O₅ thickness equivalent to about 3.5 nm of SiO₂) have been established. These specifications make the layers obtained suitable alternative to SiO₂ for high density DRAM application.     

Local structure around iron at the SiO2/Si interface

We have investigated the local structure around iron at the SiO₂/Si interface by the total-reflection fluorescence x-ray absorption fine structure technique, in conjunction with measurements of the angular dependence of x-ray fluorescence intensity. The Fe-O, Fe-Si and Fe-Fe bondings were observed around iron, in the layer formed at the SiO₂/Si interface. These results show the formation of iron silicate, consisting of iron, oxygen and silicon elements. The chemical state of iron was determined from the Fe-O bond-lengths. The Fe-valence is a mixture of Fe³⁺ and Fe²⁺, mostly Fe³⁺. These results indicate that the layer formed at the SiO₂/Si interface is iron silicate, in which a portion of Fe³⁺ ions were reduced.     

Effect of surface passivation by SiN/SiO2 of AlGaN/GaN high-electron mobility transistors on Si substrate by deep level transient spectroscopy method

Device performance and defects in AlGaN/GaN high-electron mobility transistors have been correlated. The effect of SiN/SiO₂ passivation of the surface of AlGaN/GaN high-electron mobility transistors on Si substrates is reported on DC characteristics. Deep level transient spectroscopy (DLTS) measurements were performed on the device after the passivation by a (50/100 nm) SiN/SiO₂ film. The DLTS spectra from these measurements showed the existence of the same electron trap on the surface of the device.     

Fabrication of High-Quality Co2FeSi/SiOxNy/Si(100) Tunnel Contacts Using Radical-Oxynitridation-Formed SiOxNy Barrier for Si-Based Spin Transistors

A high-quality Co₂FeSi (CFS)/SiO _x N _y /Si tunnel junction was fabricated, in which the SiO _x N _y barrier layer was formed by radical oxynitridation of an Si(100) substrate and the CFS electrode was formed by silicidation of an Fe/Co/amorphous-Si multilayer deposited on the barrier layer. The ultrathin SiO _x N _y barrier layer completely blocked diffusion of Co and Fe atoms into the Si substrate during rapid thermal annealing (RTA) for the silicidation. X-ray diffraction investigations clarified that the CFS film on the ultrathin SiO _x N _y barrier layer exhibited a highly (110)-oriented texture structure and that the film had the L2₁ structure with a high degree of L2₁ order. High resolution cross-sectional transmission electron microscopy investigations revealed that the CFS/SiO _x N _y interface was atomically flat and that the crystal lattice of the CFS film was directly grown on the SiO _x N _y surface without degradation of the crystallinity at the interface.     

Stabilization of sheet resistance for metal lines by formation of etch stop layer (ESL) trench structure

Sheet resistance of metal lines is mainly affected by critical dimension (CD), etch depth, and chemical mechanical planarization amount in damascene process. Therefore, these factors must be stably controlled in order to stabilize the sheet resistance of metal lines. Especially the etch depth, which is sensitive to the pattern density and the equipment conditions bring not only the variation of sheet resistance of metal lines but also the connection problem to the under-layered contacts. The objective of this study is to reduce the variation of the sheet resistance of metal lines by stabilization of the etch depth with etch stop layer (ESL). SiN film was used as an ESL while the intermetal dielectric (IMD) films were employed by the conventional fluorine-doped silicate glass (FSG)/SiH₄ film with an increment of thickness by the employment of SiN film as an ESL. The selectivity of oxide-to-nitride was about 6.4:1 for etch stop step. While the stop layers were removed after the etch stop step, the pre-metal dielectric was also etched at the same time for the stable connection to the under-layered contacts. Comparing the ESL method to the conventional method, more stable metal lines were formed with the in-line CD measurement, thickness measurement, cross-sectional scanning electron microscopy analysis, and sheet resistance measurement from the view point of the connection to the under-layered contacts. The stable sheet resistance of metal lines was also obtained with the changes in etch time or thickness.     

Capacitance voltage characterization of poly SiSiO2Si structures

The high frequency C-V characteristics of poly SiSiO₂Si capacitors have been studied. It is shown that the poly SiSiO₂Si capacitor C-V characteristics are significantly different from the corresponding metal-SiO₂Si capacitor due to field penetration into the poly Si layer. A comparison of the theoretical and measured C-V characteristics gives an estimate of the surface state charge density at the poly SiSiO₂ interface and indicates that the surface potential behavior of this interface is trap and surface state dominated up to poly silicon impurity concentrations of approximately 10¹⁷ cm^?3.     

Adhesion study of tetra methyl cyclo tetra siloxanes (TMCTS) and tri methyl silane (3MS)-based low-k films

Chemical vapor deposited (CVD) low-k films using tri methyl silane (3MS) precursors and tetra methyl cyclo tetra siloxanes (TMCTS) precursors were studied. Films were deposited by means of four processes, namely, O₂, O₂ + He process and CO₂, CO₂ + O₂ process for 3MS and TMCTS precursors, respectively. Interfacial adhesion energy (G_c), of low-k/Si samples, as measured by a 4-point bending test displayed a linear relationship with film hardness and modulus. Fractography studies indicated two possible failure modes with the primary interface of delamination being either at low-k/Si or Si/epoxy interface. In the former, once delamination initiated at the low-k/Si interface, secondary delamination at the Si/epoxy and epoxy/low-k interfaces was also observed. Films with low hardness (<5 GPa) displayed a low G_c (<10 J/m²) with an adhesive separation of Si/epoxy, epoxy/low-k, and low-k/Si interfaces. Whereas, films of high hardness (>5 GPa) displayed interfacial energies in excess of 10 J/m² with separation of Si/epoxy and epoxy/low-k interfaces, thus indicating excellent adhesion between the Si and low-k films. Films with high hardness have less carbon in the system causing it to be more “silicon dioxide” like and exhibiting better adhesion with the Si substrate.     

Impacts of SiN deposition parameters on n-channel metal-oxide-semiconductor field-effect-transistors

Although the incorporation of a SiN capping layer could dramatically enhance device performance, the accompanying hydrogen species contained in the capping layer may aggravate hot-carrier reliability. In order to alleviate this shortcoming, we vary the precursor flow conditions and deposition temperature of SiN film during plasma-enhanced chemical vapor deposition (PECVD) and study their impacts on the device performance and reliability. We found that SiN film with higher nitrogen content depicts larger tensile stress and therefore better mobility. More importantly, the resistance to hot-carrier degradation is also improved by increasing N₂ gas flow rate and deposition temperature because of less hydrogen diffusion from the capping layer.     

Plastic deformation magnetic assembly of out-of-plane structures using vapour phase hydrofluoric (HF) acid release

We report on the fabrication of out-of-plane microstructures using plastic deformation magnetic assembly (PDMA) and vapour phase HF release process. A 0.5 μm thin silicon oxide (SiO₂) layer deposited on blank silicon has been implemented as a sacrificial layer. A nickel film, 0.5 μm thick, deposited on top of the SiO₂ layer acts as the seed layer for the electrodeposition of a 4 μm nickel-iron permalloy film. The surface morphology and chemical composition of the permalloy film has been characterised using scanning electron microscopy and X-ray photoelectron spectroscopy (XPS), respectively. A dry vapour phase hydrofluoric (HF) acid release step has been employed to etch the sacrificial SiO₂, producing out-of-plane microstructures with high yield in the absence of a post-release drying step.     

Anomalous distribution of germanium implanted into a SOI dielectric layer after the annealing of radiation defects

The germanium-distribution profile is investigated in a Si/SiO₂/Si structure after the implantation of ⁷⁴Ge into SiO₂ dielectric layer, bonding with the Si device layer, and high-temperature annealing. The anomalously high transport and accumulation of ⁷⁴Ge atoms near the SiO₂/Si interface far from the bonded boundary is found. The observed ⁷⁴Ge distribution is beyond the framework of the existing model of diffusion of Ge in Si and SiO₂ after postimplantation annealing. A modified model of diffusion of Ge atoms near the Si/SiO₂ interface qualitatively explaining the observed features is proposed.     

MOS capacitors obtained by wet oxidation of n-type 4H-SiC pre-implanted with nitrogen

The manufacture process and the electrical characterization of MOS devices fabricated by wet oxidation of N⁺ implanted n-type 4H-SiC are here presented. Different implantation fluence and energy values were used with the aims to study the effect of the N concentration both at the SiO₂/SiC interface and within the SiO₂ film. High doses, able to amorphise a surface SiC layer to take advantage of the faster oxidation rate of amorphous with respect to crystalline SiC, were also evaluated. The electrical quality of the SiO₂/SiC system was characterized by capacitance-voltage measurements of MOS capacitors. The analyses of the collected data show that only the implanted N which is located at the oxide-SiC interfaces is effective to reduce the interface states density. On the contrary, the interface states density remains high (the same of an un-implanted reference sample) when the implanted N is completely embedded in the region consumed by the oxidation. Furthermore, none generation of fixed positive charges in the oxide was found as a consequence of the different N concentrations enclosed in the oxide films. These results were independent of the amorphisation of the implanted layer by the N⁺ ions. Our results demonstrate that by using a suitable N ion implantation and an appropriate wet oxidation treatment, it is possible to obtain a reduced thermal budget process able to decrease the interface state density near the conduction band edge. The proposed approach should be interesting for the development of the MOSFET technology on SiC.     

Si/Al2O3/ZnO:Al capacitor arrays formed in electrochemically etched porous Si by atomic layer deposition

High surface area Si/Al₂O₃/ZnO:Al capacitors were formed in electrochemically etched porous silicon. The Al₂O₃ dielectric and the ZnO:Al top electrode were deposited by atomic layer deposition in high aspect ratio porous Si. A single capacitor with a typical area of about 1 mm² consisted of about 10⁵ pores. Effective capacitance densities were between 2.0 and 2.5 μF/cm², i.e., approximately 30 times higher than for a planar capacitor prepared under identical conditions, illustrating the effect of the enhanced surface area in the porous structure.