New self-aligned T-gate InGaP/GaAs field-effect transistors grownby LP-MOCVD

This paper reports on self-aligned T-gate InGaP/GaAs FETs using n ⁺/N⁺/δ(P⁺)/n structures. N⁺ -InGaP/δ(P⁺)-InGaP/n-GaAs forms a planar-doped barrier. The inherent ohmic gate of camel-gate FETs together with a highly selective etch between an InGaP and a GaAs layers offers a self-aligned T-shape gate with a reduced effective length. A fabricated device with a reduced gate dimension of 1.5×100 (0.6×100) μm² obtained from 2×100 (1×100) μm² gate metal exhibits an extrinsic transconductance, unity-current gain frequency, and unity-power gain frequency of 78 (80) mS/mm, 9 (19.5), and 28 (30) GHz, respectively     

Effects of neutral buried p-layer on high-frequency performance ofGaAs MESFETs

Fully ion-implanted n⁺ self-aligned GaAs MESFETs with Au/WSiN refractory metal gates have been fabricated by adopting neutral buried p-layers formed by 50-keV Be-implantation. S-parameter measurements and equivalent circuit fittings are discussed. When the Be dose is increased from 2×10¹² cm^-2 to 4×10¹² cm^-2, the maximum value of the cutoff frequency with a 0.2-μm gate falls off from 108 to 78 GHz. This is because a neutral buried player makes the intrinsic gate-source capacitance increase markedly, while its influence on gate-drain capacitance and gate-source fringing capacitance is negligible. The maximum oscillation frequency recovers, however, due primarily to the drain conductance suppression by the higher-concentration buried p-layer. An equivalent value of over 130 GHz has been obtained for both 0.2-μm-gate GaAs MESFETs     

Use of Sn-doped GaAs for non-alloyed ohmic contacts to HEMTs

Segregation of Sn to the surface of MBE grown n⁺-GaAs layers allows fabrication of non-alloyed Ti/Pt/Au, Al or Ti/W ohmic contacts with low specific contact resistivities (1.1×10^-6 Ω·cm^-2). These contacts were used to realise high performance HEMTs (g_m=230 mS/mm for 1.0 μm gate length) in which Si is used as the dopant in the donor AlGaAs layer and Sn is employed in the GaAs contact layer     

A 0.4-μm gate-length AlGaAs/GaAs P-channel HIGFET with 127-mS/mmtransconductance at 77 K

WN-gate, p-channel AlGaAs-GaAs heterostructure insulated-gate field-effect transistors (HIGFETs) fabricated on a metalorganic vapor-phase epitaxy (MOVPE) wafer are discussed. A self-aligned Mg ion implantation (80 keV, 6×10¹³ cm^-2) annealed at 850°C in an arsine atmosphere and the control of the SiO₂ sidewall dimensions allow the fabrication of p-channel HIGFETs with a gate length smaller than 0.5 μm with low subthreshold current. P-channel HIGFETs with 0.4-μm gate lengths exhibit extrinsic transconductances as high as 127 mS/mm at 77 K and 54 mS/mm at 300 K     

GaAsSb for heterojunction bipolar transistors

The advantages of using GaAsSb in heterojunction bipolar transistors (HBT) are discussed with emphasis on two recent experimental results in the AlGaAs/GaAsSb material system. The performances of a prototype n-p-n AlGaAs/GaAsSb/GaAs double HBT (DHBT) that exhibits stable current gain with maximum collector current density of 5×10 ⁴ A/cm², and a p-n-p AlGaAs/GaAs HBT with a superlattice GaAsSb emitter ohmic contact which has a specific contact resistivity of 5±1×10^-7 Ω-cm² across the sample, are examined     

Molecular beam epitaxial GaAs/AlGaAs heterojunction bipolartransistors on (311)A GaAs substrates with all-silicon doping

The authors have investigated the characteristics and reproducibility of Si-doped p-type (311)A GaAs layers for application to heterojunction bipolar transistors (HBTs) grown by molecular beam epitaxy (MBE). The authors obtained p=2.2×10¹⁹ cm^-3 in a layer grown at 670°C. They have used all-Si doping to grow n-p-n transistors. These devices exhibit excellent DC characteristics with β=230 in a device with base doping of p=4×10¹⁸ cm^-3     

Low emitter resistance GaAs based HBT's without InGaAs caps

Low emitter resistance is demonstrated for AlGaAs/GaAs heterojunction bipolar transistors using Pd/Ge contacts on a GaAs contact layer. The contact resistivity to 2-10×10¹⁸ cm ^-3 n-type GaAs is 4-1×10^-7 Ω-cm² . These are comparable to contact resistivities obtained with non-alloyed contacts on InGaAs layers. The non-spiking Pd/Ge contact demonstrates thermal stability and area independent resistivity suitable for scaled devices. The substitution of Pd/Ge for AuGe/Ni GaAs emitter and collector contacts reduced by an order of magnitude the emitter-base offset voltage at high current densities and increased f_t by more than 15% with significantly improved uniformity for devices with 2 and 2.6 μm wide emitters having lengths two, four and six times the width     

High-current-gain small-offset-voltage In0.49Ga0.51P/GaAs tunneling emitter bipolar transistors grown by gas sourcemolecular beam epitaxy

Different emitter size, self-aligned In_0.49Ga_0.51 P/GaAs tunneling emitter bipolar transistors (TEBTs) grown by gas source molecular beam epitaxy (GSMBE) with 100-Å barrier thickness and 1000-Å p⁺(1×10¹⁹ cm^-3) base have been fabricated and measured at room temperature. A small-signal current gain of 236 and a small common-emitter offset voltage of 40 mV were achieved without any grading. It is found that the emitter size effect on current gain was reduced by the use of a tunnel barrier. The current gain and the offset voltage obtained were the highest and lowest reported values to date, respectively, in InGaP/GaAs system heterojunction bipolar transistors (HBTs) or TEBTs with similar base dopings and thicknesses     

⟨110⟩-oriented GaAs MESFETs

GaAs metal semiconductor field-effect transistors (MESFETs) have been successfully fabricated on molecular-beam epitaxial (MBE) films grown on the off-axis (110) GaAs substrate. The (110) substrates were tilted 6° toward the (111) Ga face in order to produce device quality two-dimensional MBE growth. Following the growth of a 0.4-μm undoped GaAs buffer, a 0.18-μm GaAs channel with a doping density of 3.4×10¹⁷ cm^-3 and a 0.12-μm contact layer with a doping density of 2×10¹⁸ cm^-3, both doped with Si, were grown. MESFET devices fabricated on this material show very low-gate leakage current, low output conductance, and an extrinsic transconductance of 200 mS/mm. A unity-current-gain cutoff frequency of 23 GHz and a maximum frequency of oscillation of 56 GHz have been achieved. These (110) GaAs MESFETs have demonstrated their potential for high-speed digital circuits as well as microwave power FET applications     

Ion-implanted high microwave power indium phosphide transistors

Encapsulated rapid thermal annealing (RTA) has been used in the fabrication of indium phosphide (InP) power metal-insulator-semiconductor field-effect transistors (MISFETs) with ion-implanted source, drain, and active channel regions. The MISFETs had a gate length of 1.4 μm. Six to ten gate fingers per device, with individual gate finger widths of 100 or 125 μm, were used to make MISFETs with total gate widths of 0.75, 0.8, or 1 mm. The source and drain contact regions and the channel region of the MISFETs were fabricated using silicon implants in semi-insulating InP at energies from 60 to 360 keV with doses from 1×10¹² to 5.6×10¹⁴ cm^-2. The implants were activated using RTA at 700°C for 30 s in N₂ or H₂ ambients using a silicon nitride encapsulant. The high-power, high-efficiency MISFETs were characterized at 9.7 GHz, and the output microwave power density for the RTA conditions used was as high as 2.4 W/mm. For a 1-W input at 9.7 GHz gains up to 3.7 dB were observed, with an associated power-added efficiency of 29%. The output power density was 70% greater than that reported for GaAs MESFETs     

InP/InGaAs HBTs with n+-InP contacting layers grown byMOMBE using SiBr4

InP/InGaAs heterojunction bipolar transistors (HBTs) with low resistance, nonalloyed TiPtAu contacts on n⁺-InP emitter and collector contacting layers have been demonstrated with excellent DC characteristics. A specific contact resistance of 5.42×10^-8 Ω·cm², which, to the best of our knowledge, is the lowest reported for TiPtAu on n-InP, has been measured on InP doped n=6.0×10¹⁹ cm^-3 using SiBr₄. This low contact resistance makes TiPtAu contacts on n-InP viable for InP/InGaAs HBTs     

Growth and metallization of AlGaAs/GaAs carbon-doped HBTs usingtrimethylamine alane by CBE

It is shown that the entire structure of high-quality AlGaAs/GaAs heterojunction bipolar transistors (HBTs) including a nonalloyed δ-doped ohmic contact and in-situ Al metallization can be grown by chemical beam epitaxy (CBE) using a new precursor, trimethylamine alane, as the Al source. The graded Al_xGa_1-xAs and uniform GaAs bases (both ~1000 A thick) are doped with carbon to high 10 ¹⁹ cm^-3 using trimethyl-Ga. A current gain of 10 at a current density of 2500 A/cm² is obtained for both uniform- and graded-base HBTs. Both devices show good output characteristics     

Effect of exponentially graded base doping on the performance ofGaAs/AlGaAs heterojunction bipolar transistors

The authors have fabricated n-p-n GaAs/AlGaAs heterojunction bipolar transistors (HBTs) with base doping graded exponentially from 5×10¹⁹ cm^-3 at the emitter edge to 5×10¹⁸ cm^-3 at the collector edge. The built-in field due to the exponentially graded doping profile significantly reduces base transit time, despite bandgap narrowing associated with high base doping. Compared to devices with the same base thickness and uniform base doping of 1×10¹⁹ cm^-3 , the cutoff frequency is increased from 22 to 31 GHz and maximum frequency of oscillation is increased from 40 to 58 GHz. Exponentially graded base doping also results ill consistently higher common-emitter current gain than uniform base doping, even though the Gummel number is twice as high and the base resistance is reduced by 40%     

High-transconductance p-channel AlGaAs/GaAs HFETs with low-energyberyllium and fluorine co-implantation self-alignment

The fabrication and electrical characteristics of p-channel AlGaAs/GaAs heterostructure FETs with self-aligned p⁺ source-drain regions formed by low-energy co-implantation of Be and F are reported. The devices utilize a sidewall-assisted refractory gate process and are fabricated on an undoped AlGaAs/GaAs heterostructure grown by MOVPE. Compared with Be implantation alone, the co-implantation of F⁺ at 8 keV with 2×10¹⁴ ions/cm² results in a 3× increase in the post-anneal Be concentration near the surface for a Be⁺ implantation at 15 keV with 4×10¹⁴ ions/cm². Co-implantation permits a low source resistance to be obtained with shallow p⁺ source-drain regions. Although short-channel effects must be further reduced at small gate lengths, the electrical characteristics are otherwise excellent and show a 77-K transconductance as high as 207 mS/mm for a 0.5-μm gate length     

High quality SiO2/Si interfaces of poly-crystallinesilicon thin film transistors by annealing in wet atmosphere

A new post-metallization annealing technique was developed to improve the quality of metal-oxide-semiconductor (MOS) devices using SiO ₂ films formed by a parallel-plate remote plasma chemical vapor deposition as gate insulators. The quality of the interface between SiO₂ and crystalline Si was investigated by capacitance-voltage (C-V) measurements. An H₂O vapor annealing at 270°C for 30 min efficiently decreased the interface trap density to 2.0×10¹⁰ cm^-2 eV^-1, and the effective oxide charge density from 1×10 ¹² to 5×10⁹ cm^-2. This annealing process was also applied to the fabrication of Al-gate polycrystalline silicon thin film transistors (poly-Si TFT's) at 270°C. In p-channel poly-Si TFT's, the carrier mobility increased from 60-400 cm² V^-1 s^-1 and the threshold voltage decreased from -5.5 to -1.7 V     

Design study of AlGaAs/GaAs HBTs

The frequency performance of AlGaAs/GaAs heterojunction bipolar transistors (HBTs) having different layouts, doping profiles, and layer thicknesses was assessed using the BIPOLE computer program. The optimized design of HBTs was studied, and the high current performances of HBTs and polysilicon emitter transistors were compared. It is shown that no current crowding effect occurs at current densities less than 1×10⁵ A/cm² for the HBT with emitter stripe width S_E<3 μm, and the HBT current-handling capability determined by the peak current-gain cutoff frequency is more than twice as large as that of the polysilicon emitter transistor. An optimized maximum oscillation frequency formula has been obtained for a typical process n-p-n AlGaAs/GaAs HBT having base doping of 1×10 ¹⁹ cm^-3     

Impact of nitrogen (N14) implantation into polysilicongate on high-performance dual-gate CMOS transistors

The effect of nitrogen (N₁₄)implant into dual-doped polysilicon gates was investigated. The electrical characteristics of sub-0.25-μm dual-gate transistors (both p- and n-channel), MOS capacitor quasi-static C-V curve, SIMS profile, poly-Si gate R_s , and oxide Q_bd were compared at different nitrogen dose levels. A nitrogen dose of 5×10¹⁵ cm^-2 is the optimum choice at an implant energy of 40 KeV in terms of the overall performance of both p- and n-MOSFETs and the oxide Q_bd. The suppression of boron penetration is confirmed by the SIMS profiles to be attributed to the retardation effect in bulk polysilicon with the presence of nitrogen. High nitrogen dose (1×10¹⁶ cm^-2) results in poly depletion and increase of sheet resistance in both unsilicided and silicided p⁺ poly, degrading the transistor performance. Under optimum design, nitrogen implantation into poly-Si gate is effective in suppressing boron penetration without degrading performance of either p- or n-channel transistors     

Electrical characterization of annealed Ti/TiN/Pt contacts onN-type 6H-SiC epilayer

We report results of the electrical characteristics of in vacuo deposited Ti/TiN/Pt contact metallization on n-type 6H-SiC epilayer as function of impurity concentration in the range of 3.3×10¹⁷ cm^-3 to 1.9×10¹⁹ cm^-3. The as-deposited contacts are rectifying, except for the highly doped sample. Only the lesser doped remains rectifying after samples are annealed at 1000°C between 0.5 and 1 min in argon. Bulk contact resistance ranging from factors of 10^-5 to 10^-4 Ω-cm² and Schottky barrier height in the range of 0.54-0.84 eV are obtained. Adhesion problems associated with metal deposition on pre-processed titanium is not observed, leading to excellent mechanical stability. Auger electron spectroscopy (AES) reveals the out diffusion of Ti-Si and agglomeration of Ti-C species at the epilayer surface. The contact resistance remains appreciably stable after treatment in air at 650°C for 65 h. The drop in SBH and the resulting stable contact resistance is proposed to be associated with the thermal activation of TiC diffusion barrier layer on the 6H-SiC epilayer during annealing     

High performance poly-Si TFTs fabricated using pulsed laserannealing and remote plasma CVD with low temperature processing

Key technologies for fabricating polycrystalline silicon thin film transistors (poly-Si TFTs) at a low temperature are discussed. Hydrogenated amorphous silicon films were crystallized by irradiation of a 30 ns-pulsed XeCl excimer laser. Crystalline grains were smaller than 100 nm. The density of localized trap states in poly-Si films was reduced to 4×10¹⁶ cm^-3 by plasma hydrogenation only for 30 seconds. Remote plasma chemical vapor deposition (CVD) using mesh electrodes realized a good interface of SiO ₂/Si with the interface trap density of 2.0×10¹⁰ cm^-2 eV^-1 at 270°C. Poly-Si TFTs were fabricated at 270°C using laser crystallization, plasma hydrogenation and remote plasma CVD. The carrier mobility was 640 cm²/Vs for n-channel TFTs and 400 cm²/Vs for p-channel TFTs. The threshold voltage was 0.8 V for n-channel TFTs and -1.5 V for p-channel TFTs. The leakage current of n-channel poly-Si TFTs was reduced from 2×10^-10 A/μm to 3×10^-13 A/μm at the gate voltage of -5 V using an offset gate electrode with an offset length of 1 μm     

Optimization of silicon bipolar transistors for high current gainat low temperatures

Bipolar transistors designed specifically for operation at liquid-nitrogen (LN₂) temperature are discussed. It is found that for high-gain LN₂ bipolar transistors, the emitter concentration should be around 5×10¹⁸ cm^-3. Compensating impurities in the base should be kept to minimum. Test bipolar transistors with polysilicon emitter contacts were fabricated using these criteria. The devices show very little current degradation between room temperature and 77 k. Polysilicon emitter contacts are also shown to be somewhat more effective at lower temperatures