A CCD color signal separation IC for single-chip color imagers

A CCD color signal separation IC for solid-state imagers with color filter arrays is described. The device simplifies peripheral circuitry and enhances picture qualities such as resolution, color fidelity, and stability for single-chip color imaging systems by incorporating CCD delay lines, sample-and-hold circuits, and dual clamp circuit. Also described is a color filter array utilizing Bayer geometry, which is used in the separation IC. Color images corresponding to a horizontal resolution of 340 TV lines with no erroneous color have been obtained from the device when used with a 580/spl times/475 element CCD imager.     

Soft-X-ray CCD imagers for AXAF

We describe the key features and performance data of a 1024×1026-pixel frame-transfer imager for use as a soft-X-ray detector on the NASA X-ray observatory Advanced X-ray Astrophysics Facility (AXAF). The four-port device features a floating-diffusion output circuit with a responsivity of 20 μV/e^- and noise of about 2 e^- at a 100-kHz data rate. Techniques for achieving the low sense-node capacitance of 5 fF are described. The CCD is fabricated on high-resistivity p-type silicon for deep depletion and includes narrow potential troughs for transfer inefficiencies of around 10^-7. To achieve good sensitivity at energies below 1 keV, we have developed a back-illumination process that features low recombination losses at the back surface and has produced quantum efficiencies of about 0.7 at 277 eV (carbon Kα)     

A very small "Super-8" format CCD imager for single-chip color camera

A "Super-8" format CCD single-chip color imager has been developed. The imager maintains high performance comparable to the conventional ⅔-in image sensors. This has been realized by using low noise and wide dynamic range designs, and monolithic complementary color filter.     

Monolithic CCD imagers in HgCdTe

Charge-coupled device (CCD) infrared detector arrays in 5 μm cutoff HgCdTe have been demonstrated for low background applications. These fully monolithic 128 by 28 element CCD arrays incorporate time-delay-and-integrate (TDI) detection, serial readout multiplexing, charge-to-voltage conversion and buffer amplification in the HgCdTe detector chip. Operation of these devices at 77 K have produced average detectivity values exceeding 3×10¹³ cm-Hz^1/2/W for a background flux level of 6×10¹² photon/cm²-sec in the 3.0 μm to 5.5 μm spectral band. Overall performance data indicates the monolithic HgCdTe CCD to be a promising alternative to present midwave infrared hybrid focal plane array technology     

New field integration frequency interleaving color television pickup system for single-chip CCD camera

A new field integration frequency interleaving color-television pickup system has been developed for a single-chip CCD color video camera. This system uses anew color filter array, comprising a plurality of unit filter arrays, each unit consisting of 2 × 4 filter elements of yellow, cyan, and green color. High color fidelity and high-resolution color pictures without frame integration lag were obtained using only a ½-inch interline transfer CCD having 500 × 400 picture elements.     

Si substrate structure for solid-state color imagers

Si substrate structure for a low-noise MOS-type color imager was proposed. Photodiodes fabricated in a p-well suppress noise due to spurious red and infrared sensitivity, blooming, and smear, Furthermore, defects are diminished by optimized three-step intrinsic gettering and a new plural ion implantation method. Defects include those due to the defect nuclei inherent in a Si substrate grown by the Czochralski method and those due to high-dose boron-ion implantation for a low-resistance well layer.     

A single-chip CMOS IC for closed-loop control of step motors

A CMOS integrated circuit for the closed-loop drive of step motors that avoids direct rotor position sensing is reported. The sequencer is integrated with the control circuit. The circuit has been fabricated on a 4 μm gate array, and its operation with the motor and chopper drive is characterized. Dynamic torque-speed characteristics, which are linear up to 85% of the maximum static torque with a 40% increase in power output compared to open-loop operation, have been obtained from a test motor. The CMOS integrated circuit controller makes the use of a step motor a viable alternative to series DC motors. It can be extended to provide a closed-loop drive circuit for step-mode operation     

A single-chip digital signal processor for telecommunication applications

A single-chip, software-programmable digital signal processor, intended for telecommunication applications, has been developed. The processor, fabricated with the most advanced 3 /spl mu/m n-channel E/D MOS technology, incorporates a 16/spl times/16-bit full hardware multiplier and a sophisticated bus structure to minimize bus conflicts, thus attaining the capability to implement 55 second-order filters at a sampling rate of 8 kHz with sufficient dynamic range to process PCM encoded signals. The authors describe the design concept, architecture, instructions, device design, and application techniques.     

Analysis of photoelectric conversion characteristics under kneecontrol operation for CCD imagers

A high-light signal suppression operation, knee control operation, was evaluated in order to apply to a STACK-CCD of 2/3-in 2 M-pixel high definition television (HDTV) imager overlaid with an amorphous silicon photoconversion layer. A smooth bend was observed in the measured photoconversion characteristics near a knee point. It was analyzed theoretically by applying a subthreshold current of the MOSFET in weak inversion for skimming excess charges and reading out signal charges through a field shift gate. The calculated curve showed good agreement with the measured curve. Effectiveness of the knee control operation using the field shift gate was shown experimentally and theoretically over that using a conventional vertical overflow drain for IT-CCD imagers     

Natural radiation events in CCD imagers at ground level

In charged coupled devices (CCDs), radiation-induced events generate electron hole pairs in silicon that cause artifacts and contribute to degrade image quality. In this work, the impact of natural radiation at ground level has been characterized at sea level, in altitude and underground for a commercial full-frame CCD device. Results have been carefully analyzed in terms of event shape, size and hourly rates. The respective contributions of atmospheric radiation and telluric contamination from ultra-traces of alpha-particle emitters have been successfully separated and quantified. Experimental results have been compared with simulation results obtained from a dedicated radiation transport and interaction code.     

Fabrication and performance of color filter arrays for solid-state imagers

A technique has been developed for the fabrication of a color filter array (CFA) to be used in conjunction with a solid-state area sensor to provide three-color image information from a single sensor. The fabrication technique employs sublimable dyes which are heat-transferred through photoresist windows onto a polymer receiving layer. Good edge sharpness and a low dye penetration depth into the polymer have been achieved. The predicted and measured spectral response of the color channels of the composite device are in good agreement. The pattern noise associated with CFA transmittance fluctuations from element to element is on the order of 10 percent.     

A CCD programmable signal processor

A generic large-coupled device (CCD) signal processor that performs 2.8-billion computations per second with a 10-MHz clock rate is described. The device's concept, design, operation, performance, and applications are reviewed. A dynamic range greater than 42 dB has been demonstrated by the device. This processor can be used as a one-dimensional correlator, a two-dimensional matched filter or a two-layer neural net device. The device demonstrates the flexibility and computational power that is possible using CCD technology     

A technique for suppressing dark current generated by interface states in buried channel CCD imagers

A technique for operating buried channel CCD imagers to achieve very low dark current with no loss in optical sensitivity is described. Using this technique on a 4-phase CCD shift register operated in an imaging mode, the dark current is reduced from 7.0 nA/cm²to 0.60 nA/cm²at 295°K.     

A new class of mosaic color encoding patterns for single-chip cameras

A simple method for generating an infinite number of different mosaic color-encoding patterns by variation of a few parameters is described, In a particular limit they approach a special type of random color mosaic. A universal decoding scheme suitable for computer optimization has been developed for evaluating these patterns. Optimal patterns for use with frame-transfer CCD's are discussed in detail.     

An adjustment-free single-chip video signal processing LSI for VHSVCR's

The authors have developed an adjustment-free single-chip video signal processing large scale integration (LSI) for VHS VCR's. This LSI's adjustment-free system was realized by using automatic feedback loop circuits. The complementary high-speed switch circuits play an important role in this system. It was possible to realize the complementary high-speed switch circuits, because this LSI has been fabricated with 2 μm bipolar process. This paper describes how the LSI has succeeded in being adjustment-free on frequency modulation (FM) carrier frequency/deviation and output video signal amplitude     

A frame-transfer CCD color imager with vertical antiblooming

A high-density 604 (H)× 576 (V) frame-transfer CCD color image sensor is realized with a pixel dimension of 10.0 (H) × 15.6 (V) µm², an image diagonal of 7.5 mm, and a total chip area of 66 mm². On-chip color filters and the use of a triple read-out register result in separate Cy, G, and Ye output signals. The imager is an n-p-n buried-channel CCD which can handle 125 times overexposure with vertical antiblooming. For the calculation of a suitable dopant distribution in the image, storage, and output sections, a four-step procedure has been developed. This procedure has proved to be successful and is much faster than an approach based exclusively on two-dimensional potential calculations.     

A single-chip frequency-shift keyed modem implemented using digital signal processing

A single-chip modem that uses digital signal processing (DSP) to perform the modem functions is described. The DSP modem is a complete single-chip modem which handles all of the popular international standards for frequency-shift keyed modems. These specifications include the Bell 103 and 202 specifications for North America, and the CCITT V.21 and V.23 specifications in Europe. The authors describe modem system aspects, the architecture and philosophy underlying the design of this modem, and some of the special features that are incorporated into the modem through the use of digital signal processing.     

A blind signal separation method for multiuser communications

A new approach based on the constant modulus (CM) criterion is proposed to separate instantaneous linear mixtures of signals using a linear memoryless multiple input multiple output (MIMO) system. Even though a nonconvex cost function is minimized, analyses show that minima correspond to parameter settings where perfect separation is achieved     

超紧凑CCD彩色电视摄像机

具有代表世界最小摄象机头之特征,并使用了CCD(Charge-Coupled Device)图象传感器的彩色电视摄象机系统,已由东芝公司研制出来.姆指大小的摄象机头(直径17.5mm,长53mm)与一个小型宽视场角的镜头及CCD图象传感器相结合.光学图象由图象传感器传感而转换成电信号并由电缆传输到摄象机控制单元.然后它们被转换成NTSC视频信号,因此,图象能在电视荧光屏上显示或由VCR(Vidio Cassette Recorder)记录.这个新系统能在广泛的领域中使用.