Monolithic balanced p-i-n/HBT photoreceiver for coherent optical heterodyne communications

Two InGaAs p-i-n photodetectors connected in a balanced configuration have been monolithically integrated with a transimpedance preamplifier made from InP-InGaAs heterojunction bipolar transistors (HBTs) to realize a balanced optoelectronic integrated circuit (OEIC) receiver. The receiver, with a bandwidth of 3 GHz and a common mode rejection of 25 dB, has a sensitivity of -49 dBm at a bit error rate of 10/sup 9/ under NRZ FSK reception at 200 Mb/s.<>     

Bipolar optical FSK transmission experiments at 150 Mbit/s and 1Gbit/s

Bipolar direct modulation has been used to overcome the nonuniform low-frequency modulation response of distributed-feedback laser transmitter in optical FSK transmission experiments at 150 Mb/s and 1 Gb/s. The heterodyne receiver sensitivity was -48 dBm for 150 Mb/s and -39 dBm for Gb/s, independently of the pseudorandom pattern length. There was no degradation in receiver sensitivity with transmission through more than 100 km of fiber     

An optical FSK heterodyne dual filter detection system for takingadvantage of DFB LD applications

An optimum system configuration for an optical frequency-shift keying (FSK) heterodyne dual-filter detection system with distributed feedback laser diodes (DFB LDs) is investigated, taking into consideration LD phase noise influence. Experimental and theoretical examination show that an IF filter bandwidth greater than 10 times the beat spectral linewidth is necessary to avoid LD phase noise influence. A 301-km long-span transmission experiment has been successfully carried out with an optimum configuration for 34 Mb/s. High receiver sensitivity, -61.8 dBm with more than 10 dB improvement over the direct detection system, has also been achieved. Experimental results at higher bit rates of 140, 200, and 280 Mb/s indicate that a modulation index greater than two is desirable to avoid cross talk between mark and space signals. With sufficient frequency deviations, high receiver sensitivities of -54.7 dBm (140 Mb/s) and -52.5 dBm (200 Mb/s) have been achieved. These represent 9.6- and 9-dB sensitivity improvement, respectively, over direct detection systems. A guide for FSK dual-filter detection system design is derived from the experimental and theoretical results. Potential application regions for a dual-filter detection system with DFB LDs are determined     

560 Mb/s optical PSK synchronous heterodyne experiment

A phase-locked optical heterodyne receiver constructed using a 1320-nm diode-pumped miniature Nd:YAG ring laser is discussed. Using this receiver and a transmitter based on another Nd:YAG laser, a 560-Mb/s phase-shift keying (PSK) synchronous heterodyne transmission was demonstrated over 78 km of single-mode fiber. With an optical phase-locked loop (PLL) natural frequency of 32 kHz and a damping factor of 1.46, the receiver sensitivity, measured at the output of the transmission link, was -48.7 dBm, or 159 photons/b. The corresponding detected sensitivity, measured on the surface of the p-i-n diode, was -51.8 dBm or 78 photons/b. This result suggests that the receiver sensitivity would have been about 82 photons/b if a balanced receiver with 0.2-dB excess coupler loss had been used. The impact of the finite intermediate frequency (IF) on heterodyne system performance was investigated; it was found that an IF of at least twice the bit rate is needed for a negligibly small penalty     

High-performance balanced dual-detector GaAs IC receiver for 565 Mbit/s optical heterodyne detection

A high-performance balanced dual-detector receiver which uses a low-noise GaAs IC transimpedance preamplifier has been developed for a 565 Mbit/s optical fibre DPSK heterodyne system. This receiver has achieved the highest sensitivity reported at this bit rate: -51-9 dBm.<>     

A 622 Mb/s high-sensitivity monolithic InGaAs-InP pin-FET receiver OEIC employing a cascode preamplifier

A long-wavelength monolithically integrated receiver optoelectronic integrated circuit (OEIC) comprising a low input-capacitance cascode transimpedance preamplifier and a p-i-n photodiode has been demonstrated. The OEIC is fabricated using metal-organic vapor phase epitaxy (MOVPE) grown epilayers and the beryllium ion-implantation technique. The receiver exhibits a sensitivity of -34.7 dBm at 622 Mb/s for BER-10/sup -9/. Using a cascode preamplifier reduces an input capacitance to about one-half of that of an inverter type, which results in the use of a larger feedback resistance of 16 k Omega . The combination of low input capacitance and large feedback resistance reduces the noise current of the receiver and results in high sensitivity.<>     

Alternate-mark-inversion optical continuous phase FSK heterodynetransmission using delay-line demodulation

Alternate-mark-inversion (AMI) optical continuous phase (CP) frequency-shift keying (FSK) heterodyne transmission using delay-line demodulation which has a higher receiver sensitivity compared to the transmission using single-filter demodulation has been achieved. Since the proposed delay-line demodulation method directly converts the received AMI-CPFSK signal into the nonreturn to zero (NRZ) baseband signal without the use of an AMI decoder, a heterodyne receiver with the same configuration as the conventional CPFSK transmission system is realized, even though AMI line coding is applied to the system. Transmission experiments at 622 Mb/s have been demonstrated for both pseudorandom 2⁷-1 and 2²³-1-b patterns at the same receiver sensitivity of -41.1 dBm (the PD input power)     

A GaAs FET-IC mixer achieving high receiver sensitivity for coherent optical heterodyne detection at 2.5 Gb/s

A FET-IC mixer that uses a Gilbert-cell multiplier with a single-to-balance conversion input buffer is proposed. The key point in the FET-IC mixer design is that a single-to-balance conversion input buffer is used to improve the amplitude and phase balance of signals output from the input buffer stage. Excellent squaring characteristics were achieved in the range from 0 to -25 dBm. The FET-IC mixer was successfully tested in a 2.5 Gb/s CPFSK demodulator for optical heterodyne reception. Compared to the best diode passive double-balanced diode mixers, receiver sensitivity was improved by 1 dB at +10 dBm electrical input power. Very small degradation in receiver sensitivity, less than 3 dB, was achieved at electrical input power levels ranging from +10 to -10 dBm.<>     

Si基单片集成850nm光接收芯片研究

设计并制备了一种Si基单片集成850nm光接收芯片,包括"P+/N-EPI/BN+"结构的光电探测器(PD)、跨阻前置放大电路及其后续处理电路。分析了PD的结构,并对其光谱响应及频率响应进行模拟,在2.0V偏压下,PD在850nm的响应度为0.131A/W,截止频率为400 MHz。采用0.5μm BCD(bipolar、CMOS和DMOS)工艺流片,光接收芯片面积约为900μm×1 100μm。测试结果表明,PD暗电流为pA量级,响应度为0.12A/W。光接收芯片在155 Mb/s速率及误码率(BER)小于10-9情况下,灵敏度为-12.0dBm;在622 Mb/s速率及BER小于10-9情况下,灵敏度为-10.0dBm,并能得到清晰的眼图。将该光接收芯片封装后接入光接收模块,进行点对点光互联实验,获得很好的光信号通路。     

140Mb/s光接收混合集成AGC主放大模块

本文介绍了140Mb/s光通信系统接收机中所用的AGC主放大模块。此模块采用厚膜电路混合集成形式,将AGC电路、主放大器制作在29.1×13.9mm~2的陶瓷片上,封装在DHM24绝缘子壳内,带宽为200MHz(3dB),增益为50dB,AGC范围大于25dB。在四次群光纤通信系统试验中,接收机灵敏度为-39dBm(误码率10~(-9)),眼图清晰。     

High-performance monolithically integratedIn0.53Ga0.47As/InP p-i-n /JFET optical receiverfront-end with adaptive feedback control

An optical transimpedance receiver front-end that is adaptable to a wide range of bit-rates up to 3 Gb/s has been realized by monolithically integrating high efficiency p-i-n photodiodes with low noise InGaAs junction field effect transistors. The transimpedance-bandwidth product of the receiver is 2.8 THz Ω. The average equivalent input noise current for full circuit bandwidth is 4.0 pA/√Hz. The preamplifier for nonreturn to zero data transmission without equalization of the frequency response at 1.55 μm offers a sensitivity of -41.5 dBm and -29.5 dBm at 140 Mb/s and 2.4 Gb/s, respectively. The dynamic range is 17 dB at 2.4 Gb/s and exceeds 30 dB at 500 Mb/s     

The STARNET coherent WDM computer communication network:experimental transceiver employing a novel modulation format

We have designed, constructed, and investigated an experimental transceiver employing a novel combined PSK and ASK modulation format for the STARNET coherent WDM computer communication network. Using this experimental transceiver, we show that it is possible to transmit and receive 2.488 Gb/s PSK circuit-switched data and 125 Mb/s ASK packet-switched data on the same lightwave. The experimental transceiver employs a custom integrated-optic LiNbO₃ modulator with both phase and amplitude sections, a 2.488 Gb/s tunable PSK heterodyne receiver, and a 125 Mb/s ASK heterodyne receiver. Both receivers function properly with error rates less than 10^-9 and a sensitivity of -32.1 dBm; the corresponding optimum ASK modulation depth is 0.57. The resulting network power budget is 26.6 dB     

DC-1 Gb/s burst-mode compatible receiver for optical busapplications

The characteristics and performance of a high-speed, burst-mode compatible receiver for optical bus or packet communications are described. It employs an Si bipolar differential transimpedance amplifier, an auto-threshold tracking level control circuit, and a DC-coupled decision circuit (ECL compatible quantizer). To cope with intermittent data packets, the threshold control circuit can capture data amplitude and set the logic threshold in about 1 ns. Using an avalanche photodiode, the typical receiver sensitivity is -37.5 dBm (10 ^-9 BER) at bit rates up to 900 Mb/s, with a dynamic range of 23 dB for both pseudorandom and burst-mode signals. At 1 Gb/s, the sensitivity is -35 dBm. With a worst-case reset time <100 ns for the threshold control circuit, this receiver can be used for optical bus applications where data signals with varying optical power are employed     

High-speed monolithic silicon photoreceivers on high resistivityand SOI substrates

We compare monolithic silicon optical receivers fabricated on high resistivity and silicon-on-insulator (SOI) substrates. Each receiver consisted of a lateral p-i-n photodiode and an NMOS transimpedance preamplifier. At a drain voltage (V_DD) of 3.5 V, a photodiode voltage (V_PD) of 30 V, and a wavelength of 850 nm, the high resistivity receiver exhibited sensitivities of -31.9 dBm at 622 Mb/s and -23.2 dBm at the maximum operating speed of 1.0 Gb/s. At V_DD =5 V and V_PD=20 V, the sensitivity of the SOI receiver was -26.1 dBm at 622 Mb/s, -20.2 dBm at 1.0 Gb/s and -12.2 dBm at the maximum speed of 2.0 Gb/s. Single supply operation at 5 V and 3 V was also demonstrated for the SOI receiver. Methods for extending the speed and improving the sensitivity characteristics in more advanced technologies with lower supply voltages are discussed     

Modulation and demodulation techniques in optical heterodyne PSKtransmission systems

Modulation and demodulation techniques are described for an optical PSK heterodyne transmission system operating at 560 Mb/s and 1.2 Gb/s. Performance limitations affecting the receiver sensitivity in a 1.2-Gb/s DPSK system, such as laser phase noise, phase modulation depth, IF center frequency deviation, and local laser power, are studied. High receiver sensitivities for PSK systems were achieved. The applicability of the Mach-Zehnder modulator as a phase modulator for 1.2-Gb/s DPSK is also demonstrated. A 1.2-Gb/s DPSK transmission of over 100 km, using polarization diversity with novel polarization-insensitive automatic frequency control in an attempt to overcome signal fading caused by polarization fluctuation in the transmitting fiber, is also described. A receiver sensitivity of less than -42.8 dBm and varying within 1.4 dB for all states of polarization was achieved. A multichannel high-definition TV (HDTV) transmission experiment using a DPSK polarization-diversity tunable receiver is described     

140Mb/s混合集成光接收机

本文报导了140Mb/s混合集成光接收机的研制结果。接收机全部由厚膜电路集成模块组成。其主放带宽为200MHz(3dB),输出电压V_(pp)值为0.8V,接收灵敏度在10~(-9)误码率下为-39dBm。     

A dual-band 5.15-5.35-GHz, 2.4-2.5-GHz 0.18-/spl mu/m CMOS transceiver for 802.11a/b/g wireless LAN

A single-chip dual-band 5.15-5.35-GHz and 2.4-2.5-GHz zero-IF transceiver for IEEE 802.11a/b/g WLAN systems is fabricated on a 0.18-/spl mu/m CMOS technology. It utilizes an innovative architecture including feedback paths that enable digital calibration to help eliminate analog circuit imperfections such as transmit and receive I/Q mismatch. The dual-band receive paths feature a 4.8-dB (3.5-dB) noise figure at 5.25 GHz (2.45 GHz). The corresponding sensitivity at 54 Mb/s operation is -76 dBm for 802.11a and -77 dBm for 802.11g, both referred at the input of the chip. The transmit chain achieves output 1-dB compression at 6 dBm (9 dBm) at 5 GHz (2.4 GHz) operation. Digital calibration helps achieve an error vector magnitude (EVM) of -33 dB (-31 dB) at 5 GHz (2.4 GHz) while transmitting -4 dBm at 54Mb/s. The die size is 19.3 mm/sup 2/ and the power consumption is 260 mW for the receiver and 320 mW (270 mW) for the transmitter at 5 GHz (2.4 GHz) operation.     

长波长高速PIN-FET光接收机集成前端

通过对PIN-FET光接收低噪声前端在高速工作状态下的特点分析,详细讨论了使用InGaAs光电PIN二极管与GaAs MESFET的高速长波长PIN-FET光接收集成前端的设计要点。着重探讨了有源器件(PIN光电管、低噪声MESFET)的性能对前端的电路噪声、传输带宽与光接收灵敏度的影响,给出了相应的计算方法与计算结果。在对MESFET噪声机制的分析与实验对比的基础上,提出了旨在降低1/f噪声的器件选择条件,较好地解决了PIN-FET研制中控制1/f噪声的问题。介绍了采用低寄生参数的光纤耦合结构、芯片钝化以及低温低应力引线等工艺措施的光电混合集成工艺。研制的前端其光谱响应范围0.9～1.7μm;最大光电响应度10.8×10~3V/W,光学3dB带宽255MHz;噪声等效功率1.2×10~(-12)W/√Hz。该前端已成功地用于1.3μm、140Mb/s单模与多模光纤系统,光接收灵敏度-39dBm;并试用于400Mb/s高速系统。     

Heterodyne video transmission with differentially encodedquadrature phase shift keying

Heterodyne transmission experiments of multiple video channels using differentially encoded quadrature phase shift keying (QPSK) are described. Combining the QPSK microwave modulation format with the subcarrier multiplexing technique results in a total of 20 video channels at 50 Mb/s being transmitted on 10 microwave subcarriers. Using a differential encoding approach, this system provides good receiver sensitivity and bandwidth efficiency, while maintaining a simple receiver design. No carrier recovery circuit or phase-locked loop is required for demodulation, which greatly reduces the receiver complexity. It is demonstrated that only a standard delay and multiply demodulator are necessary. With optical heterodyne detection, a receiver sensitivity of -37.5 dBm is achieved for the 20 channel system. The extension of this technique to intensity modulated direct detection subcarrier systems along with migration scenarios for digital video and broadband services is discussed     

A dual-mode 802.11b/bluetooth radio in 0.35-/spl mu/m CMOS

A fully integrated dual-mode CMOS transceiver tuned to 2.4 GHz consumes 65 mA in receive mode and 78 mA in transmit mode from a 3-V supply. The radio includes all the receive and transmit building blocks, such as frequency synthesizer, voltage-controlled oscillator (VCO), and power amplifier, and is intended for use in 802.11b and Bluetooth applications. The Bluetooth receiver uses a low-IF architecture for higher level of integration and lower power consumption, while the 802.11b receiver is direct conversion. The receiver achieves a typical sensitivity of -88 dBm at 11 Mb/s for 802.11b, and -83 dBm for Bluetooth mode. The receiver minimum IIP3 is -8 dBm. Both transmitters use a direct-conversion architecture, and deliver a nominal output power of 0 dBm, with a power range of 20 dB in 2-dB steps.